ZHCSHS2C may 2017 – january 2022 AWR1443
PRODUCTION DATA
| FUNCTION | SIGNAL NAME | PIN NUMBER | PIN TYPE | DEFAULT PULL STATUS(1) | DESCRIPTION |
|---|---|---|---|---|---|
| Transmitters | TX1 | B4 | O | — | Single-ended transmitter1 o/p |
| TX2 | B6 | O | — | Single-ended transmitter2 o/p | |
| TX3 | B8 | O | — | Single-ended transmitter3 o/p | |
| Receivers | RX1 | M2 | I | — | Single-ended receiver1 i/p |
| RX2 | K2 | I | — | Single-ended receiver2 i/p | |
| RX3 | H2 | I | — | Single-ended receiver3 i/p | |
| RX4 | F2 | I | — | Single-ended receiver4 i/p | |
| LVDS TX | LVDS_TXP[0] | G15 | O | — | Differential data Out – Lane 0 |
| LVDS_TXM[0] | G14 | O | — | ||
| LVDS_CLKP | J15 | O | — | Differential clock Out | |
| LVDS_CLKM | J14 | O | — | ||
| LVDS_TXP[1] | H15 | O | — | Differential data Out – Lane 1 | |
| LVDS_TXM[1] | H14 | O | — | ||
| HS_RESERVED_TXP[2] | K15 | O | — | Differential data Out – Lane 2 | |
| HS_RESERVED_TXM[2] | K14 | O | — | ||
| HS_RESERVED_TXP[3] | L15 | O | — | Differential data Out – Lane 3 | |
| HS_RESERVED_TXM[3] | L14 | O | — | ||
| LVDS_FRCLKP | M15 | O | — | Differential debug port 1 | |
| LVDS_FRCLKM | M14 | O | — | ||
| HS_DEBUG2_P | N15 | O | — | Differential debug port 2 | |
| HS_DEBUG2_M | N14 | O | — | ||
| RESERVED | B1, B15, D1, D15 | — | |||
| Reference clock | OSC_CLKOUT | A14 | O | — | Reference clock output from clocking subsystem after cleanup PLL. Can be used by peripheral chip in multichip cascading |
| System synchronization | SYNC_OUT | P11 | O | Pull Down | Low-frequency frame synchronization signal output. Can be used by peripheral chip in multichip cascading |
| SYNC_IN | N10 | I | Pull Down | Low-frequency frame synchronization signal input. This signal could also be used as a hardware trigger for frame start | |
| SPI control interface from external MCU (default peripheral mode) | SPI_CS_1 | R7 | I | Pull Up | SPI chip select |
| SPI_CLK_1 | R9 | I | Pull Down | SPI clock | |
| MOSI_1 | R8 | I | Pull Up | SPI data input | |
| MISO_1 | P5 | O | Pull Up | SPI data output | |
| SPI_HOST_INTR_1 | P6 | O | Pull Down | SPI interrupt to host | |
| RESERVED | R3, R4, R5, P4 | — | |||
| Reset | NRESET | P12 | I | — | Power on reset for chip. Active low |
| WARM_RESET | N12 | IO | Open Drain | Open-drain fail-safe warm reset signal. Can be driven from PMIC for diagnostic or can be used as status signal that the device is going through reset. | |
| Safety | NERROR_OUT | N8 | O | Open Drain | Open-drain fail-safe output signal. Connected to PMIC/Processor/MCU to indicate that some severe criticality fault has happened. Recovery would be through reset. |
| NERROR_IN | P7 | I | Open Drain | Fail-safe input to the device. Error output from any other device can be concentrated in the error signaling monitor module inside the device and appropriate action can be taken by firmware | |
| JTAG | TMS | L13 | I | Pull Up | JTAG port for standard boundary scan |
| TCK | M13 | I | Pull Down | ||
| TDI | H13 | I | Pull Up | ||
| TDO | J13 | O | — | ||
| Reference oscillator | CLKP | E14 | I | — | In XTAL mode: Input for the reference crystal In External clock mode: Single ended input reference clock port |
| CLKM | F14 | O | — | In XTAL mode: Feedback drive for the reference
crystal In External clock mode: Connect this port to ground | |
| Band-gap voltage | VBGAP | B10 | O | — | |
| Power supply | VDDIN | F13,N11,P15,R6 | POW | — | 1.2-V digital power supply |
| VIN_SRAM | R14 | POW | — | 1.2-V power rail for internal SRAM | |
| VNWA | P14 | POW | — | 1.2-V power rail for SRAM array back bias | |
| VIOIN | R13 | POW | — | I/O supply (3.3-V or 1.8-V): All CMOS I/Os would operate on this supply. | |
| VIOIN_18 | K13 | POW | — | 1.8-V supply for CMOS IO | |
| VIN_18CLK | B11 | POW | — | 1.8-V supply for clock module | |
| VIOIN_18DIFF | D13 | POW | — | 1.8-V supply for high speed interface port | |
| Reserved | G13 | POW | — | No connect | |
| VIN_13RF1 | G5,J5,H5 | POW | — | 1.3-V Analog and RF supply,VIN_13RF1 and VIN_13RF2 could be shorted on the board | |
| VIN_13RF2 | C2,D2 | POW | — | ||
| VIN_18BB | K5,F5 | POW | — | 1.8-V Analog baseband power supply | |
| VIN_18VCO | B12 | POW | — | 1.8-V RF VCO supply | |
| VSS | E5,E6,E8,E10,E11,F9,F11,G6,G7,G8,G10,H7,H9,H11,J6,J7,J8,J10,K7,K8,K9,K10,K11,L5,L6,L8,L10,R15 | GND | — | Digital ground | |
| VSSA | A1,A3,A5,A7,A9,A15,B3,B5,B7,B9,B13,B14,C1,C3,C4,C5,C6,C7,C8,C9,C15,E1,E2,E3,E13,E15,F3,G1,G2,G3,H3,J1,J2,J3,K3,L1,L2,L3, M3,N1,N2,N3,R1 | GND | — | Analog ground | |
| Internal LDO output/inputs | VOUT_14APLL | A10 | O | — | |
| VOUT_14SYNTH | A13 | O | — | ||
| VOUT_PA | A2,B2 | O | — | ||
| External clock out | PMIC_CLK_OUT | P13 | O | — | Dithered clock input to PMIC |
| MCU_CLK_OUT | N9 | O | — | Programmable clock given out to external MCU or the processor | |
| General-purpose I/Os | GPIO[0] | N4 | IO | Pull Down | General-purpose IO |
| GPIO[1] | N7 | IO | Pull Down | General-purpose IO | |
| GPIO[2] | N13 | IO | Pull Down | General-purpose IO | |
| QSPI for Serial Flash(2) | QSPI_CS | P8 | O | Pull Up | Chip-select output from the device. Device is a controller connected to serial flash peripheral. |
| QSPI_CLK | R10 | O | Pull Down | Clock output from the device. Device is a controller connected to serial flash peripheral. | |
| QSPI[0] | R11 | IO | Pull Down | Data IN/OUT | |
| QSPI[1] | P9 | IO | Pull Down | Data IN/OUT | |
| QSPI[2] | R12 | IO | Pull Up | Data IN/OUT | |
| QSPI[3] | P10 | IO | Pull Up | Data IN/OUT | |
| Flash programming and RS232 UART(2) | RS232_TX | N6 | O | Pull Down | UART pins for programming external flash in preproduction/debug hardware. |
| RS232_RX | N5 | I | Pull Up | ||
| Test and Debug output for preproduction phase. Can be pinned out on production hardware for field debug | Analog Test1 / GPADC1 | P1 | IO | — | GP ADC channel 1 |
| Analog Test2 / GPADC2 | P2 | IO | — | GP ADC channel 2 | |
| Analog Test3 / GPADC3 | P3 | IO | — | GP ADC channel 3 | |
| Analog Test4 | R2 | IO | — | GP ADC channel 4 | |
| ANAMUX / GPADC5 | C13 | IO | — | GP ADC channel 5 | |
| VSENSE / GPADC6 | C14 | IO | — | GP ADC channel 6 |