The BQ2057 is designed to work with both PNP transistor and P-channel MOSFET. The device should be chosen to handle the required power dissipation, given the circuit parameters, PCB layout and heat sink configuration. The following examples illustrate the design process for either device:

PNP transistor: Selection steps for a PNP bipolar transistor: Example: V_I = 4.5 V, I_(REG) = 1 A, 4.2-V single-cell Li-Ion (bq2057C). V_I is the input voltage to the charger and I_(REG) is the desired charge current (see Figure 10-1).

1. Determine the maximum power dissipation, P_D, in the transistor. The worst case power dissipation happens when the cell voltage, V_(BAT), is at its lowest (typically 3 V at the beginning of current regulation phase) and VI is at its maximum.
   Where V_CS is the voltage drop across the current sense resistor.
   Equation 7.
2. Determine the package size needed in order to keep the junction temperature below the manufacturer’s recommended value, T_(J)max. Calculate the total theta, θ(°C/W), needed.
   Equation 8.

   Now choose a device package with a theta at least 10% below this value to account for additional thetas other than the device. A SOT223 package, for instance, has typically a theta of 60°C/W.

3. Select a collector-emitter voltage, V_(CE), rating greater than the maximum input voltage. A 15-V device will be adequate in this example.
4. Select a device that has at least 50% higher drain current I_C rating than the desired charge current I_(REG).
5. Using Equation 9, calculate the minimum beta (β or h_FE) needed:
   Equation 9.

   where I_max(C) is the maximum collector current (in this case same as I_(REG)), and I_B is the base current (chosen to be 35 mA in this example).

Now choose a PNP transistor that is rated for V_(CE) ≥15 V, θ_JC ≤ 78°C/W, I_C ≥ 1.5 A, β_min ≥ 28 and that is in a SOT223 package.

P-channel MOSFET: Selection steps for a P-channel MOSFET: Example: V_I = 5.5 V, I_(REG) = 500 mA, 4.2-V single-cell Li-Ion (BQ2057C). V_I is the input voltage to the charger and I_(REG) is the desired charge current. (See Figure 10-4.)

1. Determine the maximum power dissipation, P_D, in the transistor.
   The worst case power dissipation happens when the cell voltage, V_(BAT), is at its lowest (typically 3 V at the beginning of current regulation phase) and V_I is at its maximum.
   Where V_D is the forward voltage drop across the reverse-blocking diode (if one is used), and V_CS is the voltage drop across the current sense resistor.
   Equation 10.
2. Determine the package size needed in order to keep the junction temperature below the manufacturer’s recommended value, T_JMAX. Calculate the total theta, θ(°C/W), needed.
   Equation 11.

   Now choose a device package with a theta at least 10% below this value to account for additional thetas other than the device. A TSSOP-8 package, for instance, has typically a theta of 70°C/W.

3. Select a drain-source voltage, V_(DS), rating greater than the maximum input voltage. A 12-V device will be adequate in this example.
4. Select a device that has at least 50% higher drain current (I_D) rating than the desired charge current I_(REG).
5. Verify that the available drive is large enough to supply the desired charge current.
   Equation 12.

   Where V_(GS) is the gate-to-source voltage, V_D is the forward voltage drop across the reverse-blocking diode (if one is used), and V_CS is the voltage drop across the current sense resistor, and V_OL(CC) is the CC pin output low voltage specification for the BQ2057.

   Select a MOSFET with gate threshold voltage, V_(GSth), rating less than the calculated V_(GS).

Now choose a P-channel MOSFET transistor that is rated for V_DS ≤ −15 V, θ_JC ≤ 110°C/W, I_D ≥ 1 A, V_(GSth) ≥ −3.5 V and in a TSSOP package.