米6体育平台手机版

ZHCS229C September 2011 – January 2020 BQ24725A

PRODUCTION DATA.

封装选项

机械数据 (封装 | 引脚)

RGR|20
- MPQF239A

散热焊盘机械数据 (封装 | 引脚)

RGR|20
- QFND242E

订购信息

5 Pin Configuration and Functions

RGR Package

20-Pin VQFN

Top View

Pin Functions

PIN		DESCRIPTION
NO.	NAME	DESCRIPTION
1	ACN	Input current sense resistor negative input. Place an optional 0.1µF ceramic capacitor from ACN to GND for common-mode filtering. Place a 0.1µF ceramic capacitor from ACN to ACP to provide differential mode filtering.
2	ACP	Input current sense resistor positive input. Place a 0.1µF ceramic capacitor from ACP to GND for common-mode filtering. Place a 0.1µF ceramic capacitor from ACN to ACP to provide differential-mode filtering.
3	CMSRC	ACDRV charge pump source input. Place a 4kΩ resistor from CMSRC to the common source of ACFET (Q1) and RBFET (Q2) limits the in-rush current on CMSRC pin.
4	ACDRV	Charge pump output to drive both adapter input n-channel MOSFET (ACFET) and reverse blocking n-channel MOSFET (RBFET). ACDRV voltage is 6V above CMSRC when voltage on ACDET pin is between 2.4V to 3.15V, voltage on VCC pin is above UVLO and voltage on VCC pin is 275mV above voltage on SRN pin so that ACFET and RBFET can be turned on to power the system by AC adapter. Place a 4kΩ resistor from ACDRV to the gate of ACFET and RBFET limits the in-rush current on ACDRV pin.
5	ACOK	AC adapter detection open drain output. It is pulled HIGH to external pull-up supply rail by external pull-up resistor when voltage on ACDET pin is between 2.4V and 3.15V, and voltage on VCC is above UVLO and voltage on VCC pin is 275mV above voltage on SRN pin, indicating a valid adapter is present to start charge. If any one of the above conditions can not meet, it is pulled LOW to GND by internal MOSFET. Connect a 10kΩ pull up resistor from ACOK to the pull-up supply rail.
6	ACDET	Adapter detection input. Program adapter valid input threshold by connecting a resistor divider from adapter input to ACDET pin to GND pin. When ACDET pin is above 0.6V and VCC is above UVLO, REGN LDO is present, ACOK comparator and IOUT are both active.
7	IOUT	Buffered adapter or charge current output, selectable with SMBus command ChargeOption(). IOUT voltage is 20 times the differential voltage across sense resistor. Place a 100pF or less ceramic decoupling capacitor from IOUT pin to GND.
8	SDA	SMBus open-drain data I/O. Connect to SMBus data line from the host controller or smart battery. Connect a 10kΩ pull-up resistor according to SMBus specifications.
9	SCL	SMBus open-drain clock input. Connect to SMBus clock line from the host controller or smart battery. Connect a 10kΩ pull-up resistor according to SMBus specifications.
10	ILIM	Charge current limit input. Program ILIM voltage by connecting a resistor divider from system reference 3.3V rail to ILIM pin to GND pin. The lower of ILIM voltage or DAC limit voltage sets charge current regulation limit. To disable the control on ILIM, set ILIM above 1.6V. Once voltage on ILIM pin falls below 75mV, charge is disabled. Charge is enabled when ILIM pin rises above 105mV.
11	BATDRV	Charge pump output to drive Battery to System n-channel MOSFET (BATFET). BATDRV voltage is 6V above SRN to turn on BATFET to power the system from battery. BATDRV voltage is SRN voltage to turn off BATFET to power system from AC adapter. Place a 4kΩ resistor from BATDRV to the gate of BATFET limits the in-rush current on BATDRV pin.
12	SRN	Charge current sense resistor negative input. SRN pin is for battery voltage sensing as well. Connect SRN pin to a 7.5 Ω resistor first then from resistor another terminal connect a 0.1µF ceramic capacitor to GND for common-mode filtering and connect to current sensing resistor. Connect a 0.1µF ceramic capacitor between current sensing resistor to provide differential mode filtering. See application information about negative output voltage protection for hard shorts on battery to ground or battery reverse connection by adding small resistor.
13	SRP	Charge current sense resistor positive input. Connect SRP pin to a 10 Ω resistor first then from resistor another terminal connect to current sensing resistor. Connect a 0.1µF ceramic capacitor between current sensing resistor to provide differential mode filtering. See application information about negative output voltage protection for hard shorts on battery to ground or battery reverse connection by adding small resistor.
14	GND	IC ground. On PCB layout, connect to analog ground plane, and only connect to power ground plane through the power pad underneath IC.
15	LODRV	Low side power MOSFET driver output. Connect to low side n-channel MOSFET gate.
16	REGN	Linear regulator output. REGN is the output of the 6V linear regulator supplied from VCC. The LDO is active when voltage on ACDET pin is above 0.6V and voltage on VCC is above UVLO. Connect a 1µF ceramic capacitor from REGN to GND.
17	BTST	High side power MOSFET driver power supply. Connect a 0.047µF capacitor from BTST to PHASE, and a bootstrap Schottky diode from REGN to BTST.
18	HIDRV	High side power MOSFET driver output. Connect to the high side n-channel MOSFET gate.
19	PHASE	High side power MOSFET driver source. Connect to the source of the high side n-channel MOSFET.
20	VCC	Input supply, diode OR from adapter or battery voltage. Use 10Ω resistor and 1µF capacitor to ground as low pass filter to limit inrush current.
PowerPAD™		Exposed pad beneath the IC. Analog ground and power ground star-connected only at the PowerPAD plane. Always solder PowerPad to the board, and have vias on the PowerPAD plane connecting to analog ground and power ground planes. It also serves as a thermal pad to dissipate the heat.