米6体育平台手机版

ZHCSDZ5C August 2014 – November 2014

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.

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机械数据 (封装 | 引脚)

YFP|6
- MXBG056R

散热焊盘机械数据 (封装 | 引脚)

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7 Specifications

7.1 Absolute Maximum Ratings⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

			MIN	MAX	UNIT
	Input voltage	IN (with respect to VSS)	–0.3	30	V
		OUT (with respect to VSS)	–0.3	7	V
		PRE-TERM, ISET, TS, CHG (with respect to VSS)	–0.3	7	V
	Input current	IN		300	mA
	Output current (continuous)	OUT		300	mA
	Output sink current	CHG		15	mA
T_J	Junction temperature		–40	150	°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted.

7.2 Handling Ratings

				MIN	MAX	UNIT
ESD	Electrostatic discharge (IEC61000-4-2)⁽¹⁾	IN, OUT, TS	1 µF between IN and GND, 1 µF between TS and GND, 2 µF between OUT and GND, x5R Ceramic or equivalent		8 contact 15 Air	kV
T_STG	Storage temperature			–65	150	°C

(1) The test was performed on IC pins that may potentially be exposed to the customer at the product level. The bq2510x IC requires a minimum of the listed capacitance, external to the IC, to pass the ESD test.

7.3 Recommended Operating Conditions ⁽¹⁾

		MIN	NOM	UNIT
V_IN	IN voltage range	3.5	28	V
V_IN	IN operating voltage range, Restricted by V_DPM and V_OVP	4.45	6.45	V
I_IN	Input current, IN pin		250	mA
I_OUT	Current, OUT pin		250	mA
T_J	Junction temperature	0	125	°C
R_PRE-TERM	Programs precharge and termination current thresholds	0.6	30	kΩ
R_ISET	Fast-charge current programming resistor	0.54	13.5	kΩ
R_TS	10k NTC thermistor range without entering BAT_EN or TTDM	1.66	258	kΩ

(1) Operation with V_IN less than 4.5V or in drop-out may result in reduced performance.

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		bq25100	UNIT
THERMAL METRIC⁽¹⁾		YFP (6 PINS)	UNIT
R_θJA	Junction-to-ambient thermal resistance	132.9	°C/W
R_θJCtop	Junction-to-case (top) thermal resistance	1.3
R_θJB	Junction-to-board thermal resistance	21.8
ψ_JT	Junction-to-top characterization parameter	5.6
ψ_JB	Junction-to-board characterization parameter	21.8
R_θJCbot	Junction-to-case (bottom) thermal resistance	n/a

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

Over junction temperature range 0°C ≤ T_J ≤ 125°C and recommended supply voltage (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
INPUT
UVLO	Undervoltage lock-out exit	V_IN: 0 V → 4 V	3.15	3.3	3.45	V
V_{HYS_UVLO}	Hysteresis on V_{UVLO_RISE} falling	V_IN: 4 V→0 V; V_{UVLO_FALL} = V_{UVLO_RISE} – V_HYS-UVLO		250		mV
V_IN-DT	Input power good detection threshold is V_OUT + V_IN-DT	Input power good if V_IN > V_OUT + V_IN-DT; V_OUT = 3.6 V; V_IN: 3.5 V → 4 V	15	60	130	mV
V_HYS-INDT	Hysteresis on V_IN-DT falling	V_OUT = 3.6 V; V_IN: 4 V → 3.5 V		31		mV
t_{DGL(PG_PWR)}	Deglitch time on exiting sleep	Time measured from V_IN: 0 V → 5 V 1-μs rise-time to charge enables; V_OUT = 3.6 V		29		ms
t_{DGL(PG_NO-PWR)}	Deglitch time on V_HYS-INDT power down. Same as entering sleep.	Time measured from V_IN: 5 V → 3.2 V 1-μs fall-time to charge disables; V_OUT = 3.6 V		29		ms
V_OVP	Input over-voltage protection threshold	V_IN: 5 V → 12 V	6.52	6.67	6.82	V
t_DGL(OVP-SET)	Input over-voltage blanking time	V_IN: 5 V → 12 V		113		μs
V_HYS-OVP	Hysteresis on OVP	V_IN: 11 V → 5 V		110		mV
t_DGL(OVP-REC)	Deglitch time exiting OVP	Time measured from V_IN: 12 V → 5 V 1-μs fall-time to charge enables		450		μs
V_IN-DPM	Low input voltage protection. Restricts lout at V_IN-DPM	Limit input source current to 50 mA; V_OUT = 3.5 V; R_ISET = 1.35 kΩ	4.25	4.31	4.37	V
ISET SHORT CIRCUIT TEST
R_{ISET_SHORT}	Highest resistor value considered a fault (short).	R_ISET: 540 Ω → 250 Ω, Iout latches off; Cycle power to reset		420	450	Ω
t_{DGL_SHORT}	Deglitch time transition from ISET short to Iout disable	Clear fault by disconnecting IN or cycling (high / low) TS/BAT_EN		1		ms
I_{OUT_CL}	Maximum OUT current limit regulation (Clamp)	V_IN = 5 V; V_OUT = 3.6 V; R_ISET: 540 Ω → 250 Ω; I_OUT latches off after t_DGL-SHORT	550	600	650	mA
BATTERY SHORT PROTECTION
V_OUT(SC)	OUT pin short-circuit detection threshold/ precharge threshold	V_OUT:3 V → 0.5 V; No deglitch	0.75	0.8	0.85	V
V_OUT(SC-HYS)	OUT pin Short hysteresis	Recovery ≥ V_OUT(SC) + V_OUT(SC-HYS); Rising; No deglitch		77		mV
I_OUT(SC)	Source current to OUT pin during short-circuit detection		9	11	13	mA
QUIESCENT CURRENT
I_OUT(PDWN)	Battery current into OUT pin	V_IN = 0 V; 0°C to 125°C			75	nA
I_OUT(PDWN)	Battery current into OUT pin	V_IN = 0 V; 0°C to 85°C			50	nA
I_OUT(DONE)	OUT pin current, charging terminated	V_IN = 6 V; V_OUT > V_OUT(REG)			6	μA
I_IN(STDBY)	Standby current into IN pin	TS = GND; V_IN≤ 6 V			125	μA
I_CC	Active supply current, IN pin	TS = open, V_IN = 6 V; TTDM – no load on OUT pin; V_OUT > V_OUT(REG); IC enabled		0.75	1	mA
BATTERY CHARGER FAST-CHARGE
V_OUT(REG)	Output voltage	T_J = 0°C to 125°C; I_OUT = 0 mA to 250 mA; V_IN = 5.0 V; V_TS-45°C≤ V_TS ≤ V_TS-0°C (bq25100/101)	4.16	4.2	4.23	V
		T_J = 0°C to 125°C; I_OUT = 0 mA to 250 mA; V_IN = 5.0 V; V_TS-45°C≤ V_TS ≤ V_TS-0°C (bq25100A)	4.26	4.3	4.33
		T_J = 0°C to 125°C; I_OUT = 0 mA to 250 mA; V_IN = 5.0 V; V_TS-45°C≤ V_TS ≤ V_TS-0°C (bq25100H/101H)	4.31	4.35	4.38
		T_J = -5°C to 55°C; I_OUT = 10mA to 75 mA; V_IN = 5.0 V; V_TS-45°C≤ V_TS ≤ V_TS-0°C (bq25100A)	4.275	4.3	4.325
V_{O_HT(REG)}	Battery hot regulation voltage	V_IN = 5.0 V; I_OUT =10 mA to 250 mA; V_TS-60°C≤ V_TS ≤ V_TS-45°C (bq25100/101)	4.02	4.06	4.1	V
V_{O_HT(REG)}	Battery hot regulation voltage	V_IN = 5.0 V; I_OUT =10 mA to 250 mA; V_TS-60°C≤ V_TS ≤ V_TS-45°C (bq25100H/101H)	4.16	4.2	4.24	V
I_OUT(RANGE)	Programmed output “fast charge” current range	V_OUT(REG) > V_OUT > V_LOWV; V_IN = 5 V; R_ISET = 0.54 kΩ to 13.5 kΩ	10		250	mA
V_DO(IN-OUT)	Drop-Out, VIN – VOUT	Adjust V_IN down until I_OUT = 0.2 A; V_OUT = 4.15 V; R_ISET = 680 Ω; T_J ≤ 100°C		220	400	mV
I_OUT	Output “fast charge” formula	V_OUT(REG) > V_OUT > V_LOWV; V_IN = 5 V		K_ISET/R_ISET		A
K_ISET	Fast charge current factor	R_ISET = K_ISET /I_OUT; 20 < I_OUT < 250 mA	129	135	145	AΩ
K_ISET	Fast charge current factor	R_ISET = K_ISET /I_OUT; 5 < I_OUT < 20 mA	125	135	145	AΩ
PRECHARGE – SET BY PRETERM PIN
V_LOWV	Pre-charge to fast-charge transition threshold		2.4	2.5	2.6	V
t_DGL1(LOWV)	Deglitch time on pre-charge to fast-charge transition			57		μs
t_DGL2(LOWV)	Deglitch time on fast-charge to pre-charge transition			32		ms
I_PRE-TERM	Refer to the Termination Section
%_PRECHG	Pre-charge current, default setting	V_OUT < V_LOWV; R_ISET = 2.7 kΩ; R_PRE-TERM= High Z or for BQ25101/101H	18	20	22	%I_OUT-CC
%_PRECHG	Pre-charge current formula	R_PRE-TERM = K_PRE-CHG (Ω/%) × %_PRE-CHG (%)	R_PRE-TERM/K_PRE-CHG%
K_PRE-CHG	% Pre-charge Factor	V_OUT < V_LOWV; V_IN = 5 V; R_PRE-TERM = 6 kΩ to 30 kΩ; R_ISET = 1.8 kΩ; R_PRE-TERM = K_PRE-CHG × %I_PRE-CHG, where %I_PRE-CHG is 20 to 100%	280	300	320	Ω/%
K_PRE-CHG	% Pre-charge Factor	V_OUT < V_LOWV; V_IN = 5 V; R_PRE-TERM = 3 kΩ to 6 kΩ; R_ISET = 1.8 kΩ; R_PRE-TERM = K_PRE-CHG × %I_PRE-CHG, where %I_PRE-CHG is 10% to 20%	265	300	340	Ω/%
TERMINATION – SET BY PRE-TERM PIN
%_TERM	Termination threshold current, default setting	V_OUT > V_RCH; R_ISET = 2.7 kΩ; R_PRE-TERM = High Z or for BQ25101/101H	9	10	11	%I_OUT-CC
%_TERM	Termination current threshold formula	R_PRE-TERM = K_TERM (Ω/%) × %TERM (%)	R_PRE-TERM/ K_TERM
K_TERM	% Term factor	V_OUT > V_RCH; V_IN = 5 V; R_PRE-TERM = 6 kΩ to 30 kΩ; R_ISET = 1.8 kΩ, R_PRE-TERM=K_TERM × %I_TERM, where %I_TERM is 10 to 50%	575	600	640	Ω/%
		V_OUT > V_RCH; V_IN = 5 V; R_PRE-TERM = 3 kΩ to 6 kΩ ; R_ISET = 1.8 kΩ, R_PRE-TERM= K_TERM × %I_TERM, where %I_TERM is 5 to 10%	555	620	685
		V_OUT > V_RCH; V_IN = 5 V; R_PRE-TERM = 750 Ω to 3 kΩ; R_ISET = 1.8 kΩ, R_PRE-TERM= K_TERM × %I_TERM, where %I_TERM is 1.25% to 5%	352	680	1001
I_PRE-TERM	Current for programming the term. and pre-chg with resistor, I_Term-Start is the initial PRE-TERM current	R_PRE-TERM = 6 kΩ; V_OUT = 4.15 V	23	25	27	μA
ITERM	Termination current range	Minimum absolute termination current	1			mA
%TERM	Termination current formula		R_TERM/ K_TERM			%
t_DGL(TERM)	Deglitch time, termination detected			29		ms
RECHARGE OR REFRESH
V_RCH	Recharge detection threshold – normal temp	V_IN = 5 V; V_TS = 0.5 V; V_OUT: 4.25 V → V_{RCH (bq25100)}; V_OUT: 4.35 V → V_{RCH (bq25100A)}; V_OUT: 4.40 V → V_{RCH (bq25100H)}	V_O(REG) –0.125	V_O(REG)–0.095	V_O(REG)–0.075	V
V_RCH	Recharge detection threshold – hot temp	V_IN = 5 V; V_TS = 0.2 V; V_OUT: 4.15 V → V_{RCH (bq25100)}; V_OUT: 4.25 V → V_{RCH (bq25100H)}	V_{O_HT(REG)} –0.130	V_{O_HT(REG)} –0.105	V_{O_HT(REG)} –0.080	V
t_DGL1(RCH)	Deglitch time, recharge threshold detected	V_IN = 5 V; V_TS = 0.5 V; V_OUT: 4.25 V → 3.5V in 1 μs; t_DGL(RCH) is time to ISET ramp		29		ms
t_DGL2(RCH)	Deglitch time, recharge threshold detected in OUT-Detect Mode	V_IN= 5 V; V_TS = 0.5 V; V_OUT = 3.5 V inserted; t_DGL(RCH) is time to ISET ramp		29		ms
BATTERY DETECT ROUTINE – (NOTE: In Hot mode V_O(REG)becomes V_{O_HT(REG)})
V_REG-BD	VOUT reduced regulation during battery detect	bq25100/101/bq25100H/101H; V_IN = 5 V; V_TS = 0.5 V, Battery absent	V_O(REG)-0.450	V_O(REG)-0.400	V_O(REG)-0.350	V
V_REG-BD	VOUT reduced regulation during battery detect	bq25100A; V_IN = 5 V; V_TS = 0.5 V; Battery absent	V_O(REG)-0.550	V_O(REG)-0.500	V_O(REG)-0.450	V
I_BD-SINK	Sink current during V_REG-BD	V_IN = 5 V; V_TS = 0.5 V; Battery absent		2		mA
t_{DGL(HI/LOW REG)}	Regulation time at V_REG or V_REG-BD	V_IN = 5 V; V_TS = 0.5 V; Battery absent		25		ms
V_BD-HI	High battery detection threshold	V_IN = 5 V; V_TS = 0.5 V; Battery absent	V_O(REG)-0.150	V_O(REG)-0.100	V_O(REG)-0.050	V
V_BD-LO	Low battery detection threshold	V_IN = 5 V; V_TS = 0.5 V; Battery absent	V_REG-BD +0.05	V_REG-BD +0.1	V_REG-BD +0.15	V
BATTERY CHARGING TIMERS AND FAULT TIMERS
t_PRECHG	Pre-charge safety timer value	Restarts when entering pre-charge; Always enabled when in pre-charge.	1700	1940	2250	s
t_MAXCH	Charge safety timer value	Clears fault or resets at UVLO, TS disable, OUT Short, exiting LOWV and Refresh	34000	38800	45000	s
BATTERY-PACK NTC MONITOR (see Note 1); TS pin: 10k NTC
I_NTC-10k	NTC bias current	V_TS = 0.3 V	48.5	50.5	52.5	μA
I_NTC-DIS-10k	10k NTC bias current when charging is disabled	V_TS = 0 V	27	30	33	μA
I_{NTC-FLDBK-10k}	INTC is reduced prior to entering TTDM to keep cold thermistor from entering TTDM	V_TS: Set to 1.525 V	4	5	6.5	μA
V_TTDM(TS)	Termination and timer disable mode Threshold – Enter	V_TS: 0.5 V → 1.7 V; Timer held in reset	1550	1600	1650	mV
V_HYS-TTDM(TS)	Hysteresis exiting TTDM	V_TS: 1.7 V → 0.5 V; Timer enabled		100		mV
V_CLAMP(TS)	TS maximum voltage clamp	V_TS = Open (float)	1900	1950	2000	mV
t_DGL(TTDM)	Deglitch exit TTDM between states			57		ms
t_DGL(TTDM)	Deglitch enter TTDM between states			8		μs
V_{TS_I-FLDBK}	TS voltage where INTC is reduce to keep thermistor from entering TTDM	INTC adjustment (90 to 10%; 45 to 6.6 uA) takes place near this spec threshold; V_TS: 1.425 V → 1.525 V		1475		mV
C_TS	Optional capacitance – ESD			0.22		μF
V_TS-0°C	Low temperature CHG pending	Low temp charging to pending; V_TS: 1 V → 1.5 V	1230	1255	1280	mV
V_HYS-0°C	Hysteresis	At 0°C; Charge pending to low temp charging; V_TS: 1.5 V → 1 V		100		mV
V_TS-10°C	Low temperature, half charge	Normal charging to low temp charging; V_TS: 0.5 V → 1 V	775	800	830	mV
V_HYS-10°C	Hysteresis	At 10°C; Low temp charging to normal CHG; V_TS: 1 V → 0.5 V		55		mV
V_TS-45°C	High temperature	At 4.1V (bq25100/101) or 4.2V (bq25100H/101H); Normal charging to high temp CHG; V_TS: 0.5 V → 0.2 V	253	268	283	mV
V_HYS-45°C	Hysteresis	At 45°C; High temp charging to normal CHG; V_TS: 0.2 V → 0.5 V		20		mV
V_TS-60°C	High temperature disable	bq25100/01/100H/101H/100L; High temp charge to pending; V_TS: 0.2 V → 0.1 V	160	170	180	mV
V_HYS-60°C	Hysteresis	At 60°C (bq25100/01/100H/101H/100L); Charge pending to high temp CHG; V_TS: 0.1 V → 0.2 V		20		mV
t_{DGL(TS_10C)}	Deglitch for TS thresholds: 10C	Normal to cold operation; V_TS: 0.6 V → 1 V		50		ms
t_{DGL(TS_10C)}	Deglitch for TS thresholds: 10C	Cold to normal operation; V_TS: 1 V → 0.6 V		12		ms
t_DGL(TS)	Deglitch for TS thresholds: 0/45/60C	Battery charging		30		ms
V_TS-EN-10k	Charge enable threshold, (10k NTC)	V_TS: 0 V → 0.175 V	84	92	100	mV
V_{TS-DIS_HYS-10k}	HYS below V_TS-EN-10k to disable, (10k NTC)	V_TS: 0.125 V → 0 V		12		mV
THERMAL REGULATION
T_J(REG)	Temperature regulation limit			125		°C
T_J(OFF)	Thermal shutdown temperature			155		°C
T_J(OFF-HYS)	Thermal shutdown hysteresis			20		°C
LOGIC LEVELS ON /CHG
V_OL	Output low voltage	I_SINK = 5 mA			0.4	V
I_LEAK	Leakage current into IC	V_CHG = 5 V			1	μA

7.6 Typical Characteristics

Setup: Typical Applications Schematic; V_IN = 5 V, V_BAT = 3.6 V (unless otherwise noted)

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig1_SLUSBV8.gif

No Battery, No Load

Figure 1. Power Up Timing

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig3_SLUSBV8.gif

V_IN 0 V -5 V-7 V-5 V

Figure 3. OVP from Normal Power-Up Operation

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig5_SLUSBV8.gif

V_IN Regulated

Figure 5. DPM-Adaptor Current Limits

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig7_SLUSBV8.gif

No Load

Figure 7. Battery Removal

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig9_SLUSBV8.gif

20-Ω resistor at OUT, No input, VBAT = 3.7 V

Figure 9. Battery Plug In

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig11_SLUSBV8.gif

Figure 11. ISET Short Prior to Power Up

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L D001_SLUSBV8.gif

Figure 13. Load Regulation Over Temperature

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L D003_SLUSBV8.gif

Figure 15. Current Regulation Over Temperature

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig2_SLUSBV8.gif

Hot Plug

Figure 2. OVP 7-V Adaptor

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig4_SLUSBV8.gif

Figure 4. TS Enable and Disable

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig6_SLUSBV8.gif

Figure 6. Hot Plug Source with No Battery - Battery Detection

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig8_SLUSBV8.gif

Figure 8. ISET Shorted During Normal Operation

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig10_SLUSBV8.gif

20-Ω resistor at OUT, No input, VBAT = 3.7 V

Figure 10. Battery Removal

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L scr_fig12_SLUSBV8.gif

90-mA Load, 120-mA ICHG

Figure 12. Power Up

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L D002_SLUSBV8.gif

Figure 14. Line Regulation Over Temperature

bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L D004_SLUSBV8.gif

bq25100 charge cycle, ICHG = 75 mA, VBAT_REG = 4.2 V

Figure 16. Battery Voltage vs Charge Current