ZHCSIJ0B July 2018 – February 2022 BQ25601D
PRODUCTION DATA
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| EN_HIZ | EN_ICHG_MON[1] | EN_ICHG_MON[0] | IINDPM[4] | IINDPM[3] | IINDPM[2] | IINDPM[1] | IINDPM[0] |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| Bit | Field | POR | Type(1) | Reset | Description | Comment |
|---|---|---|---|---|---|---|
| 7 | EN_HIZ | 0 | R/W | by REG_RST by Watchdog | 0 – Disable, 1 – Enable | Enable HIZ Mode 0 – Disable (default) 1 – Enable |
| 6 | EN_ICHG_MON[1] | 0 | R/W | by REG_RST | 00 - Enable STAT pin function (default) 01 - Reserved 10 - Reserved 11 - Disable STAT pin function (float pin) | |
| 5 | EN_ICHG_MON[0] | 0 | R/W | by REG_RST | ||
| 4 | IINDPM[4] | 1 | R/W | by REG_RST | 1600 mA | Input Current Limit Offset: 100 mA Range: 100 mA (000000) – 3.2 A (11111) Default:2400 mA (10111), maximum input current limit, not typical. IINDPM bits are changed automatically after input source detection is completed Host can over-write IINDPM register bits after input source detection is completed. |
| 3 | IINDPM[3] | 0 | R/W | by REG_RST | 800 mA | |
| 2 | IINDPM[2] | 1 | R/W | by REG_RST | 400 mA | |
| 1 | IINDPM[1] | 1 | R/W | by REG_RST | 200 mA | |
| 0 | IINDPM[0] | 1 | R/W | by REG_RST | 100 mA |