ZHCSGR3C May 2017 – September 2021 BQ25606
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| QUIESCENT CURRENTS | ||||||
| IBAT | Battery discharge current (BAT, SW, SYS) in buck mode | VBAT = 4.5 V, VBUS < VAC-UVLOZ, leakage between BAT and VBUS, TJ< 85°C | 5 | µA | ||
| IBAT | Battery discharge current (BAT, SW, SYS) | VBAT = 4.5 V, No VBUS, TJ < 85°C | 58 | 85 | µA | |
| IVBUS | Input supply current (VBUS) in buck mode | VVBUS = 12 V, VVBUS > VVBAT, converter not switching | 1.5 | 3 | mA | |
| IVBUS | Input supply current (VBUS) in buck mode | VVBUS > VUVLO, VVBUS > VVBAT, converter switching, VBAT = 3.8V, ISYS = 0A | 3 | mA | ||
| IBOOST | Battery discharge current in boost mode | VBAT = 4.2 V, boost mode, IVBUS = 0 A, converter switching | 3 | mA | ||
| VBUS, VAC AND BAT PIN POWER UP | ||||||
| VBUS_OP | VBUS operating range | VVBUS rising | 3.9 | 13.5 | V | |
| VVAC_PRESENT | REGN turn-on threshold | VVAC rising | 3.36 | 3.65 | 3.97 | V |
| VVAC_PRESENT_HYS | VVAC falling | 300 | mV | |||
| VSLEEP | Sleep mode falling threshold | (VVAC–VVBAT ), VBUSMIN_FALL ≤ VBAT ≤ VREG, VAC falling | 37 | 76 | 126 | mV |
| VSLEEPZ | Sleep mode rising threshold | (VVAC–VVBAT ), VBUSMIN_FALL ≤ VBAT ≤ VREG, VAC rising | 130 | 220 | 350 | mV |
| VVAC_OV_RISE | VAC Overvoltage rising threshold | VAC rising | 13.5 | 14.28 | 14.91 | V |
| VVAC_OV_HYS | VAC Overvoltage hysteresis | VAC falling | 520 | mV | ||
| VBAT_DPL_FALL | Battery depletion falling threshold (Q4 turn-off threshold) | VBAT falling | 2.15 | 2.6 | V | |
| VBAT_DPL_RISE | Battery Depletion rising threshold (Q4 turn-on threshold) | VBAT rising | 2.35 | 2.82 | V | |
| VBAT_DPL_HYST | Battery Depletion rising hysteresis | VBAT rising | 180 | mV | ||
| VBUSMIN_FALL | Bad adapter detection falling threshold | VBUS falling | 3.65 | 3.8 | 3.93 | V |
| VBUSMIN_HYST | Bad adapter detection hysteresis | 200 | mV | |||
| IBADSRC | Bad adapter detection current source | Sink current from VBUS to GND | 30 | mA | ||
| POWER PATH | ||||||
| VSYS_MIN | System regulation voltage | VVBAT < VSYS_MIN = 3.5V, charge enabled or disabled | 3.5 | 3.68 | V | |
| VSYS | System regulation voltage | ISYS = 0 A, VVBAT > VSYSMIN, charge disabled | VBAT + 50 mV | V | ||
| RON(RBFET) | Top reverse blocking MOSFET on-resistance between VBUS and PMID - Q1 | -40°C≤ TA ≤ 125°C | 45 | mΩ | ||
| RON(HSFET) | Top switching MOSFET on-resistance between PMID and SW - Q2 | VREGN = 5 V , -40°C≤ TA ≤ 125°C | 62 | mΩ | ||
| RON(LSFET) | Bottom switching MOSFET on-resistance between SW and GND - Q3 | VREGN = 5 V , -40°C≤ TA ≤ 125°C | 70 | mΩ | ||
| VFWD | BATFET forward voltage in supplement mode | 30 | mV | |||
| RON(BAT-SYS) | SYS-BAT MOSFET on-resistance | QFN package, Measured from BAT to SYS, VBAT = 4.2V, TJ = 25°C | 19.5 | 24 | mΩ | |
| RON(BAT-SYS) | SYS-BAT MOSFET on-resistance | QFN package, Measured from BAT to SYS, VBAT = 4.2V, TJ = –40 - 125°C | 19.5 | 30 | mΩ | |
| BATTERY CHARGER | ||||||
| VBATREG | Charge voltage | RVSET > 50 kΩ, –40 ≤ TJ ≤ 85°C | 4.187 | 4.208 | 4.229 | V |
| RVSET < 500 Ω, –40 ≤ TJ ≤ 85°C | 4.330 | 4.352 | 4.374 | V | ||
| RVSET = 10 kΩ, –40 ≤ TJ ≤ 85°C | 4.378 | 4.4 | 4.422 | V | ||
| VBATREG_ACC | Charge voltage setting accuracy | VBAT = 4.208 V or VBAT = 4.352 V, –40 ≤ TJ ≤ 85°C | –0.5% | 0.5% | ||
| ICHG_REG_RANGE | Charge current regulation range | 0 | 3000 | mA | ||
| ICHG_REG | Charge current regulation | RICHG = 1100 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V | 516 | 615 | 715 | mA |
| ICHG_REG_ACC | Charge current regulation accuracy | RICHG = 1100 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V | -16% | 16% | ||
| ICHG_REG | Charge current regulation | RICHG = 562 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V | 1.14 | 1.218 | 1.28 | A |
| ICHG_REG | Charge current regulation accuracy | RICHG = 562 Ω, VBAT = 3.1 V or VBAT = 3.8 V | -6% | 6% | ||
| ICHG_REG | Charge current regulation | RICHG = 372 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V | 1.715 | 1.813 | 1.89 | A |
| ICHG_REG_ACC | Charge current regulation accuracy | RICHG = 372 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V | -5% | 5% | ||
| KICHG | Charge current regulation setting ratio | RICHG = 372 Ω, 562 Ω VVBAT = 3.1 V or VVBAT = 3.8 V | 639 | 677 | 715 | A×Ω |
| KICHG_ACC | Charge current regulation setting ratio accuracy | RICHG = 372Ω, 562 Ω VVBAT = 3.1 V or VVBAT = 3.8 V | -6% | 6% | ||
| VBATLOWV_FALL | Battery LOWV falling threshold | Fast charge to precharge | 2.67 | 2.8 | 2.87 | V |
| VBATLOWV_RISE | Battery LOWV rising threshold | Pre-charge to fast charge | 3.0 | 3.1 | 3.24 | V |
| IPRECHG | Precharge current regulation | RICHG = 1100 Ω, VVBAT = 2.6 V, IPRECHG = 5% of ICHG = 615mA | 21 | 38 | mA | |
| IPRECHG_ACC | Precharge current regulation accuracy | Percentage of ICHG,RICHG = 1100 Ω, VVBAT = 2.6 V, ICHG = 615mA | 3.4% | 6.2% | ||
| IPRECHG | Precharge current regulation | RICHG = 562 Ω, VVBAT = 2.6 V, IPRECHG = 5% of ICHG = 1.218A | 48 | 67 | mA | |
| IPRECHG_ACC | Precharge current regulation accuracy | Percentage of ICHG,RICHG = 562 Ω, V1330 = 2.6 V, ICHG = 1.218A | 3.9% | 5.5% | ||
| IPRECHG | Precharge current regulation | RICHG = 372 Ω, VVBAT = 2.6 V, IPRECHG = 5% of ICHG = 1.813A | 76 | 97 | mA | |
| IPRECHG_ACC | Precharge current regulation accuracy | Percentage of ICHG,RICHG = 372 Ω, VVBAT = 2.6 V, ICHG = 1.813A | 4.1% | 5.4% | ||
| ITERM | Termination current regulation | RICHG = 562 Ω, VVBAT = 4.35V,CHG = 1.218A | 26 | 100 | mA | |
| ITERM_ACC | Termination current regulation accuracy | Percentage of ICHG, RICHG = 562 Ω, VVBAT = 4.35 V, ICHG = 1.218 A | 2.1% | 8.3% | ||
| ITERM | Termination current regulation | RICHG = 372 Ω, VVBAT = 4.35 V, ICHG = 1.813 A | 56 | 100 | 126 | mA |
| ITERM_ACC | Termination current regulation accuracy | Percentage of ICHG, RICHG = 372 Ω, VVBAT = 4.35 V, ICHG = 1.813 A | 3.0% | 7.0% | ||
| VSHORT | Battery short voltage | VVBAT falling | 1.85 | 2 | 2.15 | V |
| VSHORTZ | Battery short voltage | VVBAT rising | 2.05 | 2.25 | 2.35 | V |
| ISHORT | Battery short current | VVBAT < VSHORTZ | 70 | 90 | 110 | mA |
| VRECHG | Recharge Threshold below VBAT_REG | VBAT falling | 87 | 121 | 156 | mV |
| ISYSLOAD | System discharge load current | VSYS = 4.2 V | 30 | mA | ||
| INPUT VOLTAGE AND CURRENT REGULATION | ||||||
| VDPM_VBAT | Input voltage regulation limit | VVBAT < 4.1 V (VVBAT= 3.6 V) | 4.171 | 4.3 | 4.429 | V |
| VDPM_VBAT_ACC | Input voltage regulation accuracy | VVBAT < 4.1 V (VVBAT = 3.6 V) | –3% | 3% | ||
| IINDPM | USB input current regulation limit | VVBUS = 5 V, USB500 charge port detected by DPDM , –40 ≤ TJ ≤ 85°C | 448 | 500 | mA | |
| IINDPM | Input current regulation limit | RILIM = 910 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C | 505 | 526 | 550 | mA |
| IINDPM | Input current regulation limit accuracy | RILIM = 374 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C | 1220 | 1276 | 1330 | mA |
| IINDPM | Input current regulation limit | RILIM = 265 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C | 1.73 | 1.8 | 1.871 | A |
| IINDPM_ACC | Input current regulation limit accuracy | RILIM = 265 Ω, 374 Ω, 910 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C | –5% | 5% | ||
| KILIM | Input current setting ratio, ILIM = KILIM / RILIM | RILIM = 910 Ω, 374 Ω, 265 Ω, unknown adaptor detected by DPDM, –40 ≤ TJ ≤ 85°C | 459 | 478 | 500 | A×Ω |
| KILIM_ACC | Input current setting ratio, ILIM = KILIM / RILIM | RILIM = 910 Ω, 374 Ω, 265 Ω, unknown adaptor detected by DPDM, –40 ≤ TJ ≤ 85°C | –5% | 5% | ||
| IIN_START | Input current limit during system start-up sequence | 200 | mA | |||
| BAT PIN OVERVOLTAGE PROTECTION | ||||||
| VBATOVP_RISE | Battery overvoltage threshold | VBAT rising, as percentage of VBAT_REG | 103% | 104% | 105% | |
| VBATOVP_FALL | Battery overvoltage threshold | VBAT falling, as percentage of VBAT_REG | 101% | 102% | 103% | |
| THERMAL REGULATION AND THERMAL SHUTDOWN | ||||||
| TJUNCTION_REG | Junction Temperature Regulation Threshold | 110 | °C | |||
| TSHUT | Thermal Shutdown Rising Temperature | Temperature Increasing | 160 | °C | ||
| TSHUT_HYST | Thermal Shutdown Hysteresis | 30 | °C | |||
| JEITA THERMISTOR COMPARATOR (BUCK MODE) | ||||||
| VT1 | T1 (0°C) threshold, Charge suspended T1 below this temperature. | Charger suspends charge. As Percentage to VREGN | 72.4% | 73.3% | 74.2% | |
| VT1 | Falling | As Percentage to VREGN | 69% | 71.5% | 74% | |
| VT2 | T2 (10°C) threshold, Charge back to ICHG/2 and 4.2 V below this temperature | As percentage of VREGN | 67.2% | 68% | 69% | |
| VT2 | Falling | As Percentage to VREGN | 66% | 66.8% | 67.7% | |
| VT3 | T3 (45°C) threshold, charge back to ICHG and 4.05V above this temperature. | Charger suspends charge. As Percentage to VREGN | 43.8% | 44.7% | 45.8% | |
| VT3 | Falling | As Percentage to VREGN | 45.1% | 45.7% | 46.2% | |
| VT5 | T5 (60°C) threshold, charge suspended above this temperature. | As Percentage to VREGN | 33.7% | 34.2% | 35.1% | |
| VT5 | Falling | As Percentage to VREGN | 34.5% | 35.3% | 36.2% | |
| COLD OR HOT THERMISTER COMPARATOR (BOOST MODE) | ||||||
| VBCOLD | Cold Temperature Threshold, TS pin Voltage Rising Threshold | As Percentage to VREGN (Approx. –20°C w/ 103AT), –20°C ≤ TJ≤ 125°C | 79.5% | 80% | 80.5% | |
| VBCOLD | Falling | –20°C ≤ TJ≤ 125°C | 78.5% | 79% | 79.5% | |
| VBHOT | Hot Temperature Threshold, TS pin Voltage falling Threshold | As Percentage to VREGN (Approx. 60°C w/ 103AT), –20°C ≤ TJ≤ 125°C | 30.2% | 31.2% | 32.2% | |
| VBHOT | Rising | –20°C ≤ TJ≤ 125°C | 33.8% | 34.4% | 34.9% | |
| CHARGE OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE) | ||||||
| IHSFET_OCP | HSFET cycle-by-cycle over-current threshold | 5.2 | 8.0 | A | ||
| IBATFET_OCP | System over load threshold | 6.0 | A | |||
| PWM | ||||||
| fSW | PWM switching frequency | Oscillator frequency, buck mode | 1320 | 1500 | 1680 | kHz |
| Oscillator frequency, boost mode | 1170 | 1412 | 1500 | kHz | ||
| DMAX | Maximum PWM duty cycle(1) | 97% | ||||
| BOOST MODE OPERATION | ||||||
| VOTG_REG | Boost mode regulation voltage | VVBAT = 3.8 V, I(PMID) = 0 A | 4.972 | 5.126 | 5.280 | V |
| VOTG_REG_ACC | Boost mode regulation voltage accuracy | VVBAT = 3.8 V, I(PMID) = 0 A | -3 | 3 | % | |
| VBATLOWV_OTG | Battery voltage exiting boost mode | VVBAT falling | 2.6 | 2.8 | 2.9 | V |
| Battery voltage entering boost mode | VVBAT rising | 2.9 | 3.0 | 3.15 | V | |
| IOTG | OTG mode output current limit | 1.2 | 1.4 | 1.6 | A | |
| VOTG_OVP | OTG overvoltage threshold | Rising threshold | 5.55 | 5.8 | 6.15 | V |
| REGN LDO | ||||||
| VREGN | REGN LDO output voltage | VVBUS = 9 V, IREGN = 40 mA | 5.6 | 6 | 6.65 | V |
| VREGN | REGN LDO output voltage | VVBUS = 5 V, IREGN = 20 mA | 4.6 | 4.7 | 4.9 | V |
| LOGIC I/O PIN CHARACTERISTICS (CE, PSEL, SCL, SDA, INT) | ||||||
| VILO | Input low threshold CE | 0.4 | V | |||
| VIH | Input high threshold CE | 1.3 | V | |||
| IBIAS | High-level leakage current CE | Pull up rail 1.8 V | 1 | µA | ||
| VILO | Input low threshold OTG | 0.4 | V | |||
| VIH | Input high threshold OTG | 1.3 | V | |||
| IBIAS | High-level leakage current OTG | Pull up rail 1.8 V | 1 | µA | ||
| LOGIC I/O PIN CHARACTERISTICS (PG, STAT) | ||||||
| VOL | Low-level output voltage | 0.4 | V | |||
| D+/D– DETECTION | ||||||
| VD+_1P2 | D+ Threshold for Non-standard adapter (combined V1P2_VTH_LO and V1P2_VTH_HI) | 1.05 | 1.35 | V | ||
| ID+_LKG | Leakage current into D+ | HiZ | -1 | 1 | µA | |
| VD–_600MVSRC | Voltage source (600 mV) | 500 | 600 | 700 | mV | |
| ID–_100UAISNK | D– current sink (100 µA) | VD– = 500 mV, | 50 | 100 | 150 | µA |
| RD–_19K | D– resistor to ground (19 kΩ) | VD– = 500 mV, | 14.25 | 24.8 | kΩ | |
| VD–_0P325 | D– comparator threshold for primary detection | D– pin Rising | 250 | 400 | mV | |
| VD–_2P8 | D– Threshold for non-standard adapter (combined V2P8_VTH_LO and V2P8_VTH_HI) | 2.55 | 2.85 | V | ||
| VD–_2P0 | D– Comparator threshold for non-standard adapter (For non-standard – same as BQ2589x) | 1.85 | 2.15 | V | ||
| VD–_1P2 | D– Threshold for non-standard adapter (combined V1P2_VTH_LO and V1P2_VTH_HI) | 1.05 | 1.35 | V | ||
| ID–_LKG | Leakage current into D– | HiZ | -1 | 1 | µA | |