SLUSEC9B
October 2020 – July 2024
BQ25618E
,
BQ25619E
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Description (continued)
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power-On-Reset (POR)
8.3.2
Device Power Up From Battery Without Input Source
8.3.3
Power Up From Input Source
8.3.3.1
Power Up REGN LDO
8.3.3.2
Poor Source Qualification
8.3.3.3
Input Source Type Detection (IINDPM Threshold)
8.3.3.3.1
PSEL Pins Sets Input Current Limit
8.3.3.4
Input Voltage Limit Threshold Setting (VINDPM Threshold)
8.3.3.5
Power Up Converter in Buck Mode
8.3.3.6
HIZ Mode with Adapter Present
8.3.4
Power Path Management
8.3.4.1
Narrow Voltage DC (NVDC) Architecture
8.3.4.2
Dynamic Power Management
8.3.4.3
Supplement Mode
8.3.5
Battery Charging Management
8.3.5.1
Autonomous Charging Cycle
8.3.5.2
Battery Charging Profile
8.3.5.3
Charging Termination
8.3.5.4
Thermistor Qualification
8.3.5.4.1
JEITA Guideline Compliance During Charging Mode
8.3.5.5
Charging Safety Timer
8.3.6
Ship Mode and QON Pin
8.3.6.1
BATFET Disable (Enter Ship Mode)
8.3.6.2
BATFET Enable (Exit Ship Mode)
8.3.6.3
BATFET Full System Reset
8.3.7
Status Outputs ( STAT, INT , PG )
8.3.7.1
Power Good Indicator (PG_STAT Bit; BQ25619E only)
8.3.7.2
Charging Status Indicator (STAT)
8.3.7.3
Interrupt to Host ( INT)
8.3.8
Protections
8.3.8.1
Voltage and Current Monitoring in Buck Mode
8.3.8.1.1
Input Overvoltage Protection (ACOV)
8.3.8.1.2
System Overvoltage Protection (SYSOVP)
8.3.8.2
Thermal Regulation and Thermal Shutdown
8.3.8.2.1
Thermal Protection in Buck Mode
8.3.8.3
Battery Protection
8.3.8.3.1
Battery Overvoltage Protection (BATOVP)
8.3.8.3.2
Battery Overdischarge Protection
8.3.8.3.3
System Overcurrent Protection
8.3.9
Serial Interface
8.3.9.1
Data Validity
8.3.9.2
START and STOP Conditions
8.3.9.3
Byte Format
8.3.9.4
Acknowledge (ACK) and Not Acknowledge (NACK)
8.3.9.5
Slave Address and Data Direction Bit
8.3.9.6
Single Read and Write
8.3.9.7
Multi-Read and Multi-Write
8.4
Device Functional Modes
8.4.1
Host Mode and Default Mode
8.5
Register Maps
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Inductor Selection
9.2.2.2
Input Capacitor and Resistor
9.2.2.3
Output Capacitor
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Revision History
14
Mechanical, Packaging, and Orderable Information
封装选项
请参考 PDF 数据表获取器件具体的封装图。
机械数据 (封装 | 引脚)
RTW|24
散热焊盘机械数据 (封装 | 引脚)
RTW|24
QFND125K
订购信息
slusec9b_oa
slusec9b_pm
7
Specifications
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