SLUSEC9B October 2020 – July 2024 BQ25618E , BQ25619E
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Description (continued)
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Power-On-Reset (POR)
- 8.3.2 Device Power Up From Battery Without Input Source
- 8.3.3 Power Up From Input Source
- 8.3.4 Power Path Management
- 8.3.5 Battery Charging Management
- 8.3.6 Ship Mode and QON Pin
- 8.3.7 Status Outputs ( STAT, INT , PG )
- 8.3.8 Protections
- 8.3.9 Serial Interface
- 8.4 Device Functional Modes
- 8.5 Register Maps
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Revision History
- 14Mechanical, Packaging, and Orderable Information
封装选项
请参考 PDF 数据表获取器件具体的封装图。
机械数据 (封装 | 引脚)
- RTW|24
散热焊盘机械数据 (封装 | 引脚)
- RTW|24
订购信息
8.3.4.1 Narrow Voltage DC (NVDC) Architecture
The device deploys NVDC architecture with BATFET separating system from battery. The minimum system voltage is set by the SYS_MIN bits. Even with a fully depleted battery, the system is regulated above the minimum system voltage.
When the battery is below the minimum system voltage setting, the BATFET operates in linear mode (LDO mode), and the system is typically 180 mV above the minimum system voltage setting. As the battery voltage rises above the minimum system voltage, the BATFET is fully on and the voltage difference between the system and battery is the VDS of the BATFET.
When battery charging is disabled and above the minimum system voltage setting or charging is terminated, the system is always regulated at typically 50 mV above the battery voltage. The status register VSYS_STAT bit goes to 1 when the system is in minimum system voltage regulation.
Figure 8-1 System
Voltage vs Battery Voltage