ZHCSLT1B december 2020 – july 2023 BQ25672
PRODUCTION DATA
To further reduce battery leakage current, the host can shut down the charger by setting the register bits SDRV_CTRL[1:0] to 01. In this mode, the I2C is disabled and the charger is totally shut down. The device can only be woken up by plugging in an adapter.
After the SDRV_CTRL[1:0] is set to 01, the external ship FET turns off either immediately or after waiting for 10s as configured by SDRV_DLY register bit. When VBUS is high because of an adapter being present or the OTG mode being enable, SDRV_CTRL[1:0] will be reset to 00 if the host writes it to 01.
When the device exits shutdown mode, the SDRV_CTRL bits are reset to the POR default values (00).