The charger provides an N-FET driving pin (SDRV) to control an external ship FET. The SDRV pin is the output of a charge pump that provides 100 nA typical drive current to drive the ship FET gate to typically 5-V above the battery voltage. When this ship FET is off, it removes leakage current from the battery to the system. The ship FET is controlled by the SDRV_CTRL[1:0] register bits, to support the shutdown mode, ship mode and the system power reset.

• IDLE Mode when SDRV_CTRL[1:0] = 00, POR default. The external ship FET is fully on, I²C is enabled. The internal BATFET status is determined by the charging status. This mode is valid with adapter present, during forward charging, in OTG mode or in the battery only condition.
• Shutdown Mode when SDRV_CTRL[1:0] = 01. The ship FET turns off. The I²C is disabled. The charger is totally shutdown and can only be woken up by an adapter plug-in. This mode can only be entered when no adapter is present. If SDRV_CTRL[1:0] is written to 01 with an adapter present, the write is ignored.
• Ship Mode when SDRV_CTRL[1:0] = 10. The ship FET turns off. The I²C is still enabled. The charger can be woken up by setting SDRV_CTRL[1:0] back to 00, or pulling the QON pin low, or an adapter plug-in. This mode can only be entered when no adapter is present. If SDRV_CTRL[1:0] is written to 01 with an adapter present, the write is ignored.
• System Power Reset when SDRV_CTRL[1:0] = 11. The ship FET is turned off for typical 350ms to reset the system power (converter goes to HIZ mode if VBUS is high), then the ship FET is fully turned on again. The BATFET keeps the status unchanged during the system power reset. After the reset is done, SDRV_CTRL[1:0] goes back to 00.

When the host changes SDRV_CTRL[1:0] from 00 to the other values, the charger turns off the ship FET immediately or delays by t_{SM_DLY} as configured by SDRV_DLY bit.