The device deploys the NVDC architecture with a BATFET separating the system from the battery. Even with a fully depleted battery, the system is regulated above the minimum system voltage. The minimum system voltage is set by VSYSMIN bits. The default minimum system voltage at POR is determined according to different battery cell settings.

The NVDC architecture also provides the charging termination when the battery is fully charged. By turning off the BATFET, the adapter power is prioritized to support the system, which avoid the battery being continuously charged and discharged by the system load even if the adapter is present. This is very important to keep the battery in a healthy condition and extend the battery life time.

When the battery voltage is below the minimum system voltage setting, the BATFET operates in linear mode (LDO mode), and the system is regulated at around 200 mV above the minimum system voltage setting. As the battery voltage rises above the minimum system voltage, the BATFET is fully on and the voltage difference between the system and battery is the Rdson of BATFET multiplied by the charging current. When battery charging is disabled and VBAT is above the minimum system voltage setting or charging is terminated, the system is always regulated at typically 200mV (PFM disabled) or typical 600mV (PFM enabled) above battery voltage. The status register VSYS_STAT bit goes high when the system is in minimum system voltage regulation.

Figure 8-7 Typical System Voltage vs Battery Voltage for a 2S Battery Configuration