When EN_IBUS_OCP=1, the charger monitors the input current in forward charging mode in order to provide IBUS over current protection. If the input current exceeds the IBUS over current threshold IBUS_OCP (typical 8A), the charger disables the converter by setting the EN_HIZ bit to 1. In addition, the charger sets DIS_ACDRV=1 in order to disable both ACDRV1 and ACDRV2. The battery FET turns on to supplement the system load as needed. The host must set EN_HIZ and DIS_ACDRV bits to 0 in order to restart the converter. Alternatively, removing and replacing the adapter resets the EN_HIZ bit and the DIS_ACDRV bit to 0. When EN_IBUS_OCP=0, IBUS over current protection is disabled. Regardless of the EN_ IBUS_OCP bit setting, when the IBUS input current becomes higher than IBUS_OCP, an /INT pulse is asserted to alert the host if IBUS_OCP_MASK is low, the IBUS_OCP_STAT and IBUS_OCP_FLAG register bits report the fault.