ZHCSLT1B december 2020 – july 2023 BQ25672
PRODUCTION DATA
In the POR sequence, right after the D+/D- detection, the charger initiates an ADC reading on the VBUS pin voltage without any load current (VBUS at no load condition, VBUS0) before the converter starts switching. The default VINDPM threshold is set to be VBUS0 - 1.4 V (VBUS0 >= 7 V) or VBUS0 - 0.7V (VBUS0 < 7 V).
The VBUS0 can be remeasured at any time by setting the register bit FORCE_VINDPM_DET=1. The converter stops switching, the ADC measures the VBUS voltage, the VINDPM register field is updated, and then the FORCE_VINDPM_DET bit returns to 0. The force VINDPM detection only can be done when VSYS_STAT = 0 (VBAT > VSYSMIN), otherwise stopping the converter would cause VSYS to drop below VSYSMIN. If VSYS_STAT = 1 (VBAT < VSYSMIN), VBUS0 measurement does not start, the FORCE_VINDPM_DET bit resets to 0 and the VINDPM register retains its current value. The host must ensure there is a battery present prior to setting FORCE_VINDPDM_DET = 1, or to allow system to be supported by the battery during detection.
When the measured VBUS0 is out of the VINDPM register range, the changer sets the VINDPM register to the minimum value (3.6V) or maximum (22V) value as appropriate.