ZHCSNB8A February 2021 – January 2024 BQ25730
PRODUCTION DATA
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| EN_IBAT | EN_PROCHOT_LPWR | PSYS_CONFIG | RSNS_RAC | RSNS_RSR | PSYS_RATIO | RESERVED | |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CMP_REF | CMP_POL | CMP_DEG | FORCE_CONV_OFF | EN_PTM | EN_SHIP_DCHG | AUTO_WAKEUP_EN | |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 7 | EN_IBAT | R/W | 0b | IBAT Enable Enable the IBAT output buffer. In low power mode (EN_LWPWR=1b), IBAT buffer is always disabled regardless of this bit value. 0b Turn off IBAT buffer to minimize Iq <default at POR> 1b: Turn on IBAT buffer |
| 6 | EN_PROCHOT_LPWR | R/W | 0b | Enable PROCHOT during battery only low power mode With battery only, enable VSYS in PROCHOT with low power consumption. Do not enable this function with adapter present. Refer to Section 8.3.20.1 for more details. 0b: Disable Independent Comparator low power PROCHOT <default at POR> 1b: Enable Independent Comparator low power PROCHOT |
| 5-4 | PSYS_CONFIG | R/W | 11b | PSYS Enable and Definition Register Enable PSYS sensing circuit and output buffer (whole PSYS circuit). In low power mode (EN_LWPWR=1b), PSYS sensing and buffer are always disabled regardless of this bit value. 00b: PSYS=PBUS+PBAT 01b: PSYS=PBUS 10b: Reserved 11b: Turn off PSYS buffer to minimize Iq<default at POR> |
| 3 | RSNS_RAC | R/W | 1b | Input sense resistor RAC 0b: 10 mΩ 1b: 5 mΩ <default at POR> |
| 2 | RSNS_RSR | R/W | 1b | Charge sense resistor RSR 0b: 10 mΩ 1b: 5 mΩ <default at POR> |
| 1 | PSYS_RATIO | R/W | 1b | PSYS Gain Ratio of PSYS output current vs total system power 0b: 0.25 µA/W 1b: 1 µA/W <default at POR> |
| 0 | RESERVED | R/W | 1b |
RESERVED |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 7 | CMP_REF | R/W | 0b | Independent Comparator internal Reference 0b: 2.3 V <default at POR> 1b: 1.2 V |
| 6 | CMP_POL | R/W | 0b | Independent Comparator output Polarity 0b: When CMPIN is above internal threshold, CMPOUT is LOW (internal hysteresis) <default at POR> 1b: When CMPIN is below internal threshold, CMPOUT is LOW (external hysteresis) |
| 5-4 | CMP_DEG | R/W | 00b | Independent comparator deglitch time, only applied to the falling edge of CMPOUT (HIGH → LOW). 00b: Independent comparator is enabled with output deglitch time 5 µs <default at POR> 01b: Independent comparator is enabled with output deglitch time of 2 ms 10b: Independent comparator is enabled with output deglitch time of 20 ms 11b: Independent comparator is enabled with output deglitch time of 5 sec |
| 3 | FORCE_CONV_OFF | R/W | 0b | Force Converter Off function When independent comparator triggers, (CMPOUT pin pulled down) converter latches off, at the same time, CHRG_OK signal goes LOW to notify the system. Charge current is also set to zero internally, but charge current register setting keeps the same. To get out of converter latches off, firstly the CMPOUT should be released to high and secondly FORCE_CONV_OFF bit should be cleared (=0b). 0b: Disable this function <default at POR> 1b: Enable this function |
| 2 | EN_PTM | R/W | 0b | PTM enable register bit, it will automatically reset to zero 0b: disable PTM. <default at POR> 1b: enable PTM. |
| 1 | EN_SHIP_DCHG | R/W | 0b | Discharge SRN for Shipping Mode. Used to discharge VBAT pin capacitor voltage which is necessary for battery gauge device shipping mode. When this bit is 1, discharge SRN pin down in 140 ms 20 mA. When 140 ms is over, this bit is reset to 0b automatically. If this bit is written to 0b by host before 140 ms expires, VSYS should stop discharging immediately. Note if after 140-ms SRN voltage is still not low enough for battery gauge device entering ship mode, the host may need to start a new 140-ms discharge cycle. 0b: Disable shipping mode <default at POR> 1b: Enable shipping mode |
| 0 | AUTO_WAKEUP_EN | R/W | 0b | Auto Wakeup Enable When this bit is HIGH, if the battery is below VSYS_MIN , the device should automatically enable 256-mA charging current for 30 mins. When the battery is charged up above minimum system voltage, charge will terminate and the bit is reset to LOW. The charger will also exit auto wake up if host write a new charge current value to charge current register Reg0x02(). 0b: Disable <default at POR> 1b: Enable |