ZHCSNB8A February   2021  – January 2024 BQ25730

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. 说明(续)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics(BQ25730)
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power-Up Sequence
      2. 8.3.2  Two-Level Battery Discharge Current Limit
      3. 8.3.3  Fast Role Swap Feature
      4. 8.3.4  CHRG_OK Indicator
      5. 8.3.5  Input and Charge Current Sensing
      6. 8.3.6  Input Voltage and Current Limit Setup
      7. 8.3.7  Battery Cell Configuration
      8. 8.3.8  Device HIZ State
      9. 8.3.9  USB On-The-Go (OTG)
      10. 8.3.10 Converter Operation
      11. 8.3.11 Inductance Detection Through IADPT Pin
      12. 8.3.12 Converter Compensation
      13. 8.3.13 Continuous Conduction Mode (CCM)
      14. 8.3.14 Pulse Frequency Modulation (PFM)
      15. 8.3.15 Switching Frequency and Dithering Feature
      16. 8.3.16 Current and Power Monitor
        1. 8.3.16.1 High-Accuracy Current Sense Amplifier (IADPT and IBAT)
        2. 8.3.16.2 High-Accuracy Power Sense Amplifier (PSYS)
      17. 8.3.17 Input Source Dynamic Power Management
      18. 8.3.18 Input Current Optimizer (ICO)
      19. 8.3.19 Two-Level Adapter Current Limit (Peak Power Mode)
      20. 8.3.20 Processor Hot Indication
        1. 8.3.20.1 PROCHOT During Low Power Mode
        2. 8.3.20.2 PROCHOT Status
      21. 8.3.21 Device Protection
        1. 8.3.21.1 Watchdog Timer
        2. 8.3.21.2 Input Overvoltage Protection (ACOV)
        3. 8.3.21.3 Input Overcurrent Protection (ACOC)
        4. 8.3.21.4 System Overvoltage Protection (SYSOVP)
        5. 8.3.21.5 Battery Overvoltage Protection (BATOVP)
        6. 8.3.21.6 Battery Discharge Overcurrent Protection (BATOC)
        7. 8.3.21.7 Battery Short Protection (BATSP)
        8. 8.3.21.8 System Undervoltage Lockout (VSYS_UVP) and Hiccup Mode
        9. 8.3.21.9 Thermal Shutdown (TSHUT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forward Mode
        1. 8.4.1.1 System Voltage Regulation with Narrow VDC Architecture
        2. 8.4.1.2 Battery Charging
      2. 8.4.2 USB On-The-Go
      3. 8.4.3 Pass Through Mode (PTM)-Patented Technology
    5. 8.5 Programming
      1. 8.5.1 I2C Serial Interface
        1. 8.5.1.1 Timing Diagrams
        2. 8.5.1.2 Data Validity
        3. 8.5.1.3 START and STOP Conditions
        4. 8.5.1.4 Byte Format
        5. 8.5.1.5 Acknowledge (ACK) and Not Acknowledge (NACK)
        6. 8.5.1.6 Target Address and Data Direction Bit
        7. 8.5.1.7 Single Read and Write
        8. 8.5.1.8 Multi-Read and Multi-Write
        9. 8.5.1.9 Write 2-Byte I2C Commands
    6. 8.6 Register Map
      1. 8.6.1  ChargeOption0 Register (I2C address = 01/00h) [reset = E70Eh]
      2. 8.6.2  ChargeCurrent Register (I2C address = 03/02h) [reset = 0000h]
        1. 8.6.2.1 Battery Pre-Charge Current Clamp
      3. 8.6.3  ChargeVoltage Register (I2C address = 05/04h) [reset value based on CELL_BATPRESZ pin setting]
      4. 8.6.4  ChargerStatus Register (I2C address = 21/20h) [reset = 0000h]
      5. 8.6.5  ProchotStatus Register (I2C address = 23/22h) [reset = B800h]
      6. 8.6.6  IIN_DPM Register (I2C address = 25/24h) [reset = 4100h]
      7. 8.6.7  ADCVBUS/PSYS Register (I2C address = 27/26h)
      8. 8.6.8  ADCIBAT Register (I2C address = 29/28h)
      9. 8.6.9  ADCIIN/CMPIN Register (I2C address = 2B/2Ah)
      10. 8.6.10 ADCVSYS/VBAT Register (I2C address = 2D/2Ch)
      11. 8.6.11 ChargeOption1 Register (I2C address = 31/30h) [reset = 3F00h]
      12. 8.6.12 ChargeOption2 Register (I2C address = 33/32h) [reset = 00B7]
      13. 8.6.13 ChargeOption3 Register (I2C address = 35/34h) [reset = 0434h]
      14. 8.6.14 ProchotOption0 Register (I2C address = 37/36h) [reset = 4A81h(2S~5s) 4A09(1S)]
      15. 8.6.15 ProchotOption1 Register (I2C address = 39/38h) [reset = 41A0h]
      16. 8.6.16 ADCOption Register (I2C address = 3B/3Ah) [reset = 2000h]
      17. 8.6.17 ChargeOption4 Register (I2C address = 3D/3Ch) [reset = 0048h]
      18. 8.6.18 Vmin Active Protection Register (I2C address = 3F/3Eh) [reset = 006Ch(2s~5s)/0004h(1S)]
      19. 8.6.19 OTGVoltage Register (I2C address = 07/06h) [reset = 09C4h]
      20. 8.6.20 OTGCurrent Register (I2C address = 09/08h) [reset = 3C00h]
      21. 8.6.21 InputVoltage(VINDPM) Register (I2C address = 0B/0Ah) [reset =VBUS-1.28V]
      22. 8.6.22 VSYS_MIN Register (I2C address = 0D/0Ch) [reset value based on CELL_BATPRESZ pin setting]
      23. 8.6.23 IIN_HOST Register (I2C address = 0F/0Eh) [reset = 2000h]
      24. 8.6.24 ID Registers
        1. 8.6.24.1 ManufactureID Register (I2C address = 2Eh) [reset = 40h]
        2. 8.6.24.2 Device ID (DeviceAddress) Register (I2C address = 2Fh) [reset = D5h]
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Snubber and Filter for Voltage Spike Damping
        2. 9.2.2.2 ACP-ACN Input Filter
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Output Capacitor
        6. 9.2.2.6 Power MOSFETs Selection
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Layout Example Reference Top View
      2. 11.2.2 Inner Layer Layout and Routing Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 术语表
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

ProchotOption1 Register (I2C address = 39/38h) [reset = 41A0h]

Figure 8-30 ProchotOption1 Register (I2C address = 39/38h) [reset = 41A0h]
7 6 5 4 3 2 1 0
IDCHG_TH1 IDCHG_DEG1
R/W R/W R/W R/W R/W R/W R/W R/W
7 6 5 4 3 2 1 0
PP_VINDPM PP_COMP PP_ICRIT PP_INOM PP_IDCHG1 PP_VSYS PP_BATPRES PP_ACOK
R/W R/W R/W R/W R/W R/W R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

When the REG0x38h[7:0] are set to be disabled, the PROCHOT event associated with that bit will not be reported in the PROCHOT status register REG0x22h[7:0] any more, and the PROCHOT pin will not be pulled low any more if the event happens.

Table 8-36 ProchotOption1 Register (I2C address = 39h) Field Descriptions
BIT FIELD TYPE RESET DESCRIPTION
7-2 IDCHG_TH1 R/W 010000b

IDCHG level 1 Threshold

6 bit, range, range 0 A to 64512 mA, step 1024 mA.

Measure current between SRN and SRP.

Trigger when the discharge current is above the threshold.

If the value is programmed to 000000b PROCHOT is always triggered.

Default: 16256 mA or 010000b

1-0 IDCHG_DEG1 R/W 01b

IDCHG level 1 Deglitch Time

00b: 78 ms

01b: 1.25s <default at POR>

10b: 5s

11b: 20s

Table 8-37 ProchotOption1 Register (I2C address = 38h) Field Descriptions
BIT FIELD TYPE RESET DESCRIPTION
7 PP_VINDPM R/W 1b

VINDPM PROCHOT Profile

When all the REG0x38[7:0] , REG0x3D[1], REG0x3C[2]bits are 0, PROCHOT function is disabled.

0b: disable

1b: enable<default at POR>

6 PP_COMP R/W 0b

Independent comparator PROCHOT Profile

When not in low power mode(Battery only), use this bit to control independent comparator PROCHOT profiles.

When in low power mode(Battery only), this bit will lose controllability to independent comparator PROCHOT profiles. Need to use EN_PROCHOT_LPWR to enable independent comparator and its PROCHOT profile.

0b: disable <default at POR>

1b: enable

5 PP_ICRIT R/W 1b

ICRIT PROCHOT Profile

0b: disable

1b: enable <default at POR>

4 PP_INOM R/W 0b

INOM PROCHOT Profile

0b: disable <default at POR>

1b: enable

3 PP_IDCHG1 R/W 0b

IDCHG1 PROCHOT Profile

0b: disable <default at POR>

1b: enable

2 PP_VSYS R/W 0b

VSYS PROCHOT Profile

0b: disable <default at POR>

1b: enable

1 PP_BATPRES R/W 0b

Battery removal PROCHOT Profile

0b: disable <default at POR>

1b: enable (one-shot falling edge triggered)

If BATPRES is enabled in PROCHOT after the battery is removed, it will immediately send out one-shot PROCHOT pulse.

0 PP_ACOK R/W 0b Adapter removal PROCHOT Profile

0b: disable <default at POR>

1b: enable

EN_LWPWR= 0b to assert PROCHOT pulse after adapter removal.

If PP_ACOK is enabled in PROCHOT after the adapter is removed, it will be pulled low.