The device powers up from the higher
voltage of VBUS or VBAT through integrated power selector. The charger starts POR
(power on reset) when VBUS exceeds VVBUS_UVLOZ or VBAT exceeds
VVBAT_UVLOZ. 5 ms after either VBUS or VBAT becomes valid, the
charger resets all the registers to the default state. Another 5 ms later, the user
registers become accessible to the host.
Power up sequence when the charger is
powered up from VBUS:
- After VBUS above
VVBUS_UVLOZ, enable 6-V LDO REGN pin and VDDA pin voltage increase accordingly.
CHRG_OK pin goes HIGH and the AC_STAT is configured to 1.
- After passing VBUS
qualification, the REGN voltage is setup. VINDPM is detected in VBUS steady
state voltage and IIN_DPM is detected at ILIM_HIZ pin steady state
voltage.
- Battery CELL configuration
is read at CELL_BATPRESZ pin voltage and compared to VDDA to determine cell
configuration. Corresponding the default value of ChargeVoltage register
(REG0x05/04()), ChargeCurrent register (Reg0x03/02), VSYS_MIN and SYSOVP threshold are loaded.
- Converter powers up.
Power up sequence when the charger
is powered up from VBAT:
- If only battery is present
and the voltage is above VVBAT_UVLOZ , charger wakes up .
- By default, the charger is
in low power mode (EN_LWPWR = 1b) with lowest quiescent current. The REGN
LDO stays off. The Quiescent current is minimized.
PROCHOT is available through the independent
comparator by setting EN_PROCHOT_LPWR=1b.
- The adapter present
comparator is activated, to monitor the VBUS voltage.
- SDA and SDL lines stand by
waiting for host commands.
- Device can move to
performance mode by configuring EN_LWPWR = 0b. The host can enable IBAT
buffer through setting EN_IBAT=1b to monitor discharge current. The PSYS,
PROCHOT or the independent comparator also can be
enabled by the host.
- In performance mode, the
REGN LDO is always available to provide an accurate reference and gate drive
voltage for the converter.