The device integrates all the loop compensation, thereby providing a high density solution with ease of use. At startup, the device toggles the SW node for about 40 ms to determine the correct compensation values for a given set of passives. If the battery is above VBAT_LOWV, then SW2 is toggled. SW1 is toggled otherwise.

The charger employs a synchronous buck-boost converter that allows charging from a wide range of input voltage sources. The charger operates in buck, buck-boost or boost mode. The converter can operate uninterruptedly and continuously across the three operation modes. During buck-boost mode, the converter alternates a SW1 pulse with a SW2 pulse, with effective switching frequency interleaved among these pulses for highest efficiency operation.

During boost mode operation, the HS FET is forced to turn on for 225 ns in each switching cycle to ensure inductor energy is delivered to the output, effectively limiting the maximum boosting ratio. For example, when device is configured to switch at 500 kHz, the switching period is 2 μs, yielding a duty cycle limit of (1 - 0.225 μs/2 μs) = 88.75%. Given a 5-V input, this translates to a maximum 44-V output assuming 100% efficiency. The true output will be lower than this ideal limit. At lower switching frequencies, the maximum duty cycle increases, making the limitation less significant.