ZHCSOK3 august 2023 BQ25756
PRODUCTION DATA
The device integrates all the loop compensation, thereby providing a high density solution with ease of use. For faster transient reponse in reverse operating mode, the EN_CONV_FAST_TRANSIENT bit can be set to 1. If device is not used in reverse boost mode operation, this section can be disregarded.
When the converter is operating in boost mode, the non-continuous inductor current flow to the load results in a right-half plane (RHP) zero. The RHP zero location is:
For good phase margin, the unity gain bandwidth (UGBW) of the converter should be about 1/3 of the RHPz. The boost output capacitor (Cload), and the converter transient parameters (R1, gm1) need to be scaled to move the location of the UGBW of the converter.
The device adjusts Adiv, gm1 and R1 based on the output voltage and the EN_CONV_FAST_TRANSIENT bit setting per the table below. During some boost case scenarios, the Cload needs to be adjusted to limit the converter bandwidth.
Boost Output Voltage | Adiv | C1 | EN_CONV_FAST_TRANSIENT = 0 | EN_CONV_FAST_TRANSIENT = 1 | ||
---|---|---|---|---|---|---|
gm1 | R1 | gm1 | R1 | |||
≤8 V | 1/5 | 75 pF | 0.4 μ | 600 kΩ | 2 μ | 1.3 MΩ |
8 V to 16 V | 1/10 | 75 pF | 0.47 μ | 1 MΩ | 2 μ | 1.8 MΩ |
16 V to 32 V | 1/20 | 75 pF | 0.67 μ | 2.8 MΩ | 2 μ | 2.8 MΩ |
>32 V | 1/40 | 75 pF | 2 μ | 2.8 MΩ | 2 μ | 2.8 MΩ |
For best stability, the UGBW of the converter should be limited to 1/3 of the RHP zero, or 3.8kHz. If EN_CONV_FAST_TRANSIENT = 1, the equation becomes:
Solving the above for Cload gives ≥674 μF capacitor requirement.
Conversely, if EN_CONV_FAST_TRANSIENT = 0, the UGBW equation becomes:
Solving the above for Cload gives ≥51 μF capacitor requirement. However, the minimum recommended capacitor for converter stability is 80 μF, so this minimum value should be used.