Figure 12-2 PCB Layout Example (Top Layer Copper Pours Removed on Left, Shown on Right)

#GUID-827970A7-2B6D-417F-BF71-833A8334ADB2 shows the recommended placement and routing of external components. The components are labelled with "R," "C" or "L" to indicate resistor, capacitor or inductor and a number that corresponds to the numbered list in GUID-EC8B7A76-7058-4DE6-889A-B5B614077B2C.html. Since the layout guidelines are listed in priority order, this number also provides a priority for component placement.

The placement of C1 and C2 0.1 µF PMID and SYS capacitors is critical for noise filtering. They should be placed on the same layer as the BQ25798, as close to the IC as possible. This will generally require that the traces to connect SW1 and SW2 to the inductor are routed on a different layer.

The SW1 and SW2 pins are routed to vias placed under the IC and then back out on an inner PCB layer. This supports the tightest placement of C1 and C2 capctiors as described above. These vias are also used to route to the C7 BTST1 and BTST2 capactiors on the bottom layer as shown.