While operating the converter in reverse mode, the device monitors the reverse voltage, V_VAC. When V_VAC falls below the undervoltage threshold (programmable via SYSREV_UV register bit), the device stops switching, clears the EN_REV bit, and exits Reverse mode. During the over-voltage event duration, the REVERSE_STAT bit is cleared and the REVERSE_FLAG bit is set to indicate a fault in reverse mode. An INT pulse is also asserted to the host