SLUSFH5A May 2024 – October 2024 BQ25856-Q1
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The device has built-in safety timer to prevent extended charging cycle due to abnormal battery conditions. The user can program fast charge safety timer through I2C (CHG_TMR bits). When safety timer expires, the fault register CHG_TMR_STAT bit is set to 1, and an INT pulse is asserted to the host. The safety timer feature can be disabled by clearing EN_CHG_TMR bit.
During input voltage or input current regulation, the safety timer counts at half clock rate as the actual charge current is likely to be below the programmed setting. For example, if the charger is in input current regulation (IAC_DPM_STAT=1) throughout the whole charging cycle, and the safety timer is set to 5 hours, then the timer will expire in 10 hours. The timer also counts at half clock rate for TS pin events which reduce charge current (refer to JEITA Guideline Compliance in Charge Mode section). This half clock rate feature can be disabled by setting EN_TMR2X = 0.
During faults which disable charging, timer is suspended. Once the fault goes away, safety timer resumes. If the charging cycle is stopped and started again, the timer gets reset (toggle CE pin or EN_CHG bit restarts the timer).
The pre-charge safety timer is a fixed 2 hour counter that runs when VBAT < VBAT_LOWV. The pre-charge safety timer is disabled when EN_PRECHG bit is 0.