SLUSFH5A May 2024 – October 2024 BQ25856-Q1
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The device is a host controlled charger, but it can operate in default mode without host management. In default mode, the device can be used as an autonomous charger with no host or while host is in sleep mode. When the charger is in default mode, WD_STAT bit becomes HIGH, WD_FLAG is set to 1, and a INT is asserted low to alert the host (unless masked by WD_MASK). The WD_FLAG bit would read as a '1' upon the first read and then '0' upon subsequent reads. When the charger is in host mode, WD_STAT bit is LOW.
After power-on-reset, the device starts in default mode with watchdog timer expired. All the registers are in the default settings.
In default mode, the device keeps charging the battery with default 2-hour pre-charging safety timer and the 12-hour fast charging safety timer. At the end of the 2-hour or 12-hour timer expiration, the charging is stopped if termination has not been detected.
A write to any I2C register transitions the charger from default mode to host mode, and initiates the watchdog timer. All the device parameters can be programmed by the host. To keep the device in host mode, the host has to reset the watchdog timer by writing 1 to WD_RST bit before the watchdog timer expires (WD_STAT bit is set), or disable watchdog timer by setting WATCHDOG bits = 00.
When the watchdog timer is expired, the device returns to default mode and select registers are reset to default values as detailed in the Register Map section. The Watchdog timer will be reset on any write if the watchdog timer has expired. When watchdog timer expires, WD_STAT and WD_FLAG is set to 1, and /INT is asserted low to alert the host (unless masked by WD_MASK).