The REGN LDO regulator provides a regulated bias supply for the IC and the TS external resistors. Additionally, REGN voltage can be used to drive the buck-boost switching FETs directly by tying the DRV_SUP pin to REGN. The pull-up rail of PG, STAT1, and STAT2 can be connected to REGN as well. The REGN LDO is enabled when below conditions are valid:

1. VAC voltage above V_{VAC_OK} and charge is enabled in forward mode.
2. BAT voltage above 3.8 V in Reverse mode and Reverse Mode is enabled (EN_REV = 1)

At high input voltages and/or large gate drive requirements, the power loss from gate driving via the REGN LDO can be excessive. This power for the gate drivers can be provided externally by directly driving the DRV_SUP pin with a high efficiency supply ranging from 4.5 V to 12 V. This supply should be able to provide at least 50 mA or more as required to drive the switching FET gate charge.

The power dissipation for driving the gates via the REGN LDO is: ${\mathrm{P}}_{\mathrm{R}\mathrm{E}\mathrm{G}\mathrm{N}}=(\mathrm{V}\mathrm{A}\mathrm{C}-{\mathrm{V}}_{\mathrm{R}\mathrm{E}\mathrm{G}\mathrm{N}})\times {\mathrm{Q}}_{\mathrm{G}\left(\mathrm{T}\mathrm{O}\mathrm{T}\right)\mathrm{1,2},\mathrm{3,4}}\times {\mathrm{f}}_{\mathrm{S}\mathrm{W}}$, where Q_{G(TOT)1,2,3,4} is the sum of the total gate charge for all switching FETs and f_SW is the programmed switching frequency. The Safe Operating Area (SOA) below is based on a 1-W power loss limit.

Figure 7-2 REGN LDO Safe Operating Area (SOA)