ZHCSD75D March 2014 – January 2018
PRODUCTION DATA.
MIN | MAX | UNIT | ||
---|---|---|---|---|
VVPWR | Power input range | –0.3 | 5.5 | V |
VREG25 | Supply voltage range | –0.3 | 2.75 | V |
VPACKP | PACKP input pin | –0.3 | 5.5 | V |
PACK+ input when external 2-kΩ resistor is in series with PACKP input pin (see Figure 19 and Figure 20) | –0.3 | 28 | V | |
VOUT | Voltage output pins (DSG, CHG) | –0.3 | 10 | V |
VIOD1 | Push-pull IO pins (RC2) | –0.3 | 2.75 | V |
VIOD2 | Open-drain IO pins (SDA, SCL, HDQ, NC) | –0.3 | 5.5 | V |
VBAT | BAT input pin | –0.3 | 5.5 | V |
VI | Input voltage range to all other pins (SRP, SRN) | –0.3 | 5.5 | V |
VTS | Input voltage range for TS | –0.3 | 2.75 | V |
TA | Operating free-air temperature | –40 | 85 | °C |
TF | Functional temperature | –40 | 100 | °C |
Tstg | Storage temperature range | –65 | 150 | °C |