ZHCSEJ9D april 2014 – june 2021 BQ28Z610
PRODUCTION DATA
- 1
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Description (Continued)
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Supply Current
- 7.6 Power Supply Control
- 7.7 Low-Voltage General Purpose I/O, TS1
- 7.8 Power-On Reset (POR)
- 7.9 Internal 1.8-V LDO
- 7.10 Current Wake Comparator
- 7.11 Coulomb Counter
- 7.12 ADC Digital Filter
- 7.13 ADC Multiplexer
- 7.14 Cell Balancing Support
- 7.15 Internal Temperature Sensor
- 7.16 NTC Thermistor Measurement Support
- 7.17 High-Frequency Oscillator
- 7.18 Low-Frequency Oscillator
- 7.19 Voltage Reference 1
- 7.20 Voltage Reference 2
- 7.21 Instruction Flash
- 7.22 Data Flash
- 7.23 Current Protection Thresholds
- 7.24 Current Protection Timing
- 7.25 N-CH FET Drive (CHG, DSG)
- 7.26 I2C Interface I/O
- 7.27 I2C Interface Timing
- 7.28 Typical Characteristics
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Battery Parameter Measurements
- 8.3.2 Coulomb Counter (CC)
- 8.3.3 CC Digital Filter
- 8.3.4 ADC Multiplexer
- 8.3.5 Analog-to-Digital Converter (ADC)
- 8.3.6 ADC Digital Filter
- 8.3.7 Internal Temperature Sensor
- 8.3.8 External Temperature Sensor Support
- 8.3.9 Power Supply Control
- 8.3.10 Power-On Reset
- 8.3.11 Bus Communication Interface
- 8.3.12 Cell Balancing Support
- 8.3.13 N-Channel Protection FET Drive
- 8.3.14 Low Frequency Oscillator
- 8.3.15 High Frequency Oscillator
- 8.3.16 1.8-V Low Dropout Regulator
- 8.3.17 Internal Voltage References
- 8.3.18 Overcurrent in Discharge Protection
- 8.3.19 Short-Circuit Current in Charge Protection
- 8.3.20 Short-Circuit Current in Discharge 1 and 2 Protection
- 8.3.21 Primary Protection Features
- 8.3.22 Gas Gauging
- 8.3.23 Charge Control Features
- 8.3.24 Authentication
- 8.4 Device Functional Modes
- 9 Applications and Implementation
- Power Supply Requirements
- 10Layout
- 11Device and Documentation Support
- Mechanical, Packaging, and Orderable Information
8.3.10 Power-On Reset
In the event of a power-cycle, the BQ28Z610 AFE holds its internal RESET output pin high for tRST duration to allow its internal 1.8-V LDO and LFO to stabilize before running the AGG. The AFE enters power-on reset when the voltage at VREG falls below VREGIT– and exits reset when VREG rises above VREGIT– + VHYS for tRST time. After tRST, the BQ28Z610 AGG will write its trim values to the AFE.
Figure 8-2 POR Timing Diagram