9.2.2.1.1 Protection FETs

The N-channel charge and discharge FETs must be selected for a given application (Figure 7). Most portable battery applications are a good match for the CSD17308Q3. The TI CSD17308Q3 is an 47A-A, 30-V device with Rds(on) of 8.2 mΩ when the gate drive voltage is 10 V.

If a precharge FET is used, R28 is calculated to limit the precharge current to the desired rate. Be sure to account for the power dissipation of the series resistor. The precharge current is limited to (V_charger – V_bat)/R28 and maximum power dissipation is (V_charger – V_bat)²/R28.

The gates of all protection FETs are pulled to the source with a high-value resistor between the gate and source to ensure they are turned off if the gate drive is open.

Capacitors C16 and C17 help protect the FETs during an ESD event. The use of two devices ensures normal operation if one of them becomes shorted. To have good ESD protection, the copper trace inductance of the capacitor leads must be designed to be as short and wide as possible. Ensure that the voltage rating of both C16 and C17 are adequate to hold off the applied voltage if one of the capacitors becomes shorted.

Figure 7. bq3055 Protection FETs

9.2.2.1.2 Chemical Fuse

The chemical fuse (Sony Chemical, Uchihashi, and so forth) is ignited under command from either the bq294705 secondary voltage protection IC or from the FUSE pin of the gas gauge. Either event applies a positive voltage to the gate of Q1, shown in Figure 8, which then sinks current from the third terminal of the fuse, causing it to ignite and open permanently.

It is important to carefully review the fuse specifications and match the required ignition current to that available from the N-channel FET. Ensure that the proper voltage, current, and Rds(on) ratings are used for this device. The fuse control circuit is discussed in detail in FUSE Circuitry.

Figure 8. FUSE Circuit

9.2.2.1.3 Lithium-Ion Cell Connections

The important thing to remember about the cell connections is that high current flows through the top and bottom connections; therefore, the voltage sense leads at these points must be made with a Kelvin connection to avoid any errors due to a drop in the high-current copper trace. The location marked 4P in Figure 9 indicates the Kelvin connection of the most positive battery node. The connection marked 1N is equally important. The VC5 pin (a ground reference for cell voltage measurement), which is in the older generation devices, is not in the bq3055 device. Hence, the single-point connection at 1N to the low-current ground is needed to avoid an undesired voltage drop through long traces while the gas gauge is measuring the bottom cell voltage.

Figure 9. Lithium-Ion Cell Connections

9.2.2.1.4 Sense Resistor

As with the cell connections, the quality of the Kelvin connections at the sense resistor is critical. The sense resistor must have a temperature coefficient no greater than 75 ppm to minimize current measurement drift with temperature (Figure 10). Choose the value of the sense resistor to correspond to the available overcurrent and short-circuit ranges of the bq3055. Select the smallest value possible to minimize the negative voltage generated on the bq3055 V_SS nodes during a short-circuit. This pin has an absolute minimum of –0.3 V. For a pack with two parallel cylindrical cells, 10 mΩ is generally ideal. Parallel resistors can be used as long as good Kelvin sensing is ensured.

The ground scheme of bq3055 is different from the older generation devices. In previous devices, the device ground (or low-current ground) is connected to the SRN side of the Rsense resistor pad. The bq3055, however, connects the low-current ground on the SRP side of the Rsense resistor pad, close to the battery 1N terminal (see Lithium-Ion Cell Connections). This is because the bq3055 has one less VC pin (a ground reference pin VC5) compared to the previous devices. The pin was removed and was internally combined to SRP.

Figure 10. Sense Resistor

9.2.2.1.5 ESD Mitigation

A pair of series 0.1-μF ceramic capacitors is placed across the PACK+ and PACK– terminals to help in the mitigation of external electrostatic discharges. The two devices in series ensure continued operation of the pack if one of the capacitors becomes shorted.

Optionally, a tranzorb, such as the SMBJ2A, can be placed across the terminals to further improve ESD immunity.

9.2.2.2.1 Differential Low-Pass Filter

As shown in Figure 11, a differential filter must precede the current sense inputs of the gas gauge. This filter eliminates the effect of unwanted digital noise, which can cause offset in the measured current. Even the best differential amplifier has less common-mode rejection at high frequencies. Without a filter, the amplifier input stage may rectify a strong RF signal, which then may appear as a DC offset error.

Five percent tolerance of the components is adequate because capacitor C15 shunts C12/C13, and reduces AC common mode arising from component mismatch. It is also proven to reduce offset and noise error by maintaining µa symmetrical placement pattern and adding ground shielding for the differential filter network.

Figure 11. Differential Low-Pass Filter

9.2.2.2.2 Power Supply Decoupling and RBI

Power supply decoupling is important for optimal operation of the bq3055 advanced gas gauges. As shown in Figure 12, a single 1-μF ceramic decoupling capacitor from REG33 to V_SS and REG25 to V_SS must be placed adjacent to the IC pins.

The RBI pin is used to supply backup RAM voltage during brief transient power outages. The partial reset mechanism makes use of the RAM to restore the critical CPU registers following a temporary loss of power. A standard 0.1-μF ceramic capacitor is connected from the RBI pin to ground, as shown in Figure 12.

Figure 12. Power Supply Decoupling

9.2.2.2.3 System Present

The System Present signal is used to inform the gas gauge whether the pack is installed into or removed from the system. In the host system, this pin is grounded. The PRES pin of the bq3055 is occasionally sampled to test for system present. To save power, an internal pullup resistor is provided by the gas gauge during a brief 4-μs sampling pulse once per second.

Because the System Present signal is part of the pack connector interface to the outside world, it must be protected from external electrostatic discharge events. An integrated ESD protection on the PRES device pin reduces the external protection requirement to just R25 for an 8-kV ESD contact rating (Figure 13). However, if it is possible that the System Present signal may short to PACK+, then R18 and D3 must be included for high-voltage protection.

Figure 13. System Present ESD and Short Protection

9.2.2.2.4 SMBus Communication

Similar to the System Present pin, the SMBus clock and data pins have integrated high-voltage ESD protection circuits that reduce the need for external Zener diode protection. When using the circuit shown in Figure 14, the communication lines can withstand an 8-kV (contact) ESD strike. C23 and C24 are selected with a 100-pF value to meet the SMBus specifications. If it is desirable to provide increased protection with a larger input resistor and/or Zener diode, carefully investigate the signal quality of the SMBus signals under worst-case communication conditions.

The SMbus clock and data lines have internal pulldowns. When the gas gauge senses that both lines are low (such as during removal of the pack), the device performs auto-offset calibration and then goes into sleep mode to conserve power.

Figure 14. ESD Protection for SMB Communication

9.2.2.2.5 FUSE Circuitry

The FUSE pin of the bq3055 is designed to ignite the chemical fuse if one of the various safety criteria is violated (Figure 15). The FUSE pin also monitors the state of the secondary-voltage protection IC. Q3 ignites the chemical fuse when its gate is high. The 7-V output of the bq29705 is divided by R13 and R14, which provides adequate gate drive for Q1 while guarding against excessive back current into the bq29705 if the FUSE signal is high.

Using C14 is generally a good practice, especially for RFI immunity. C14 may be removed, if desired, because the chemical fuse is a comparatively slow device and is not affected by any sub-microsecond glitches that may come from the SAFE output during the cell connection process.

Figure 15. FUSE Circuit

When the bq3055 is commanded to ignite the chemical fuse, the FUSE pin activates to give a typical 8-V output. The new design makes it possible to use a higher Vgs FET for Q1. This improves the robustness of the system, as well as widens the choices for Q1.

9.2.2.2.6 PFIN Detection

As previously mentioned, the FUSE pin has a dual role on this device. When bq3055 is not commanded to ignite the chemical fuse, the FUSE pin defaults to sense the OUT pin status of the secondary voltage protector. When the secondary voltage protector ignites the chemical fuse, the high voltage is sensed by the FUSE pin, and the bq3055 sets the PFIN flag accordingly.

9.2.2.3.1 Cell and Battery Inputs

Each cell input is conditioned with a simple RC filter, which provides ESD protection during cell connect and acts to filter unwanted voltage transients. The resistor value allows some trade-off for cell balancing versus safety protection.

The internal cell balancing FETs in bq3055 provide about typically 310 Ω (310 Ω with cell voltage ≥ 2 V. The cell balancing FETs Rds-on reduced to typically 125 Ω with cell voltage ≥ 4 V), which can be used to bypass charge current in individual cells that may be overcharged with respect to the others (Figure 16). The purpose of this bypass path is to reduce the current into any one cell during charging to bring the series elements to the same voltage. Series resistors placed between the input pins and the positive series element nodes control the bypass current value. The bq3055 device is designed to take up to 10-mA cell balancing current. Series input resistors between 100 Ω and 1 kΩ are recommended for effective cell balancing.

The BAT input uses a diode (D1) and 1-μF ceramic capacitor (C9) to isolate and decouple it from the cells in the event of a transient dip in voltage caused by a short-circuit event.

Also, as described previously in High-Current Path, the top and bottom nodes of the cells must be sensed at the battery connections with a Kelvin connection to prevent voltage sensing errors caused by a drop in the high-current PCB copper.

Figure 16. Cell and BAT Inputs

9.2.2.3.2 External Cell Balancing

Internal cell balancing can only support up to 10 mA. External cell balancing provides another option for faster cell balancing. For details, refer to the application note, Fast Cell Balancing Using External MOSFET (SLUA420).

9.2.2.3.3 PACK and FET Control

The PACK and V_CC inputs provide power to the bq305x from the charger. The PACK input also provides a method to measure and detect the presence of a charger. The PACK input uses a 10-KΩ resistor, whereas the V_CC input uses a diode to guard against input transients and prevents malfunction of the date driver during short-circuit events (Figure 17).

The N-channel charge and discharge FETs are controlled with 5.1-KΩ series gate resistors, which provide a switching time constant of a few microseconds. The 3.01-MΩ resistors ensure that the FETs are off in the event of an open connection to the FET drivers. Q4 is provided to protect the discharge FET (Q3) in the event of a reverse-connected charger. Without Q4, Q3 can be driven into its linear region and suffer severe damage if the PACK+ input becomes slightly negative.

Q4 turns on in that case to protect Q3 by shorting its gate to source. To use the simple ground gate circuit, the FET must have a low gate turnon threshold. If it is desired to use a more standard device, such as the 2N7000 as the reference schematic, the gate should be biased up to 3.3 V with a high-value resistor. The bq3055 device uses an external P-channel, precharge FET controlled by GPOD. When selecting the external load resistor, user should take into account the max charger voltage and the Rdson of the internal precharge FET.

Figure 17. bq3055 PACK and FET Control

9.2.2.3.4 Regulator Output

As mentioned in Power Supply Decoupling and RBI, the two low-dropout regulators in the bq3055 require capacitive compensation on the output. The outputs must have a 1-μF ceramic capacitor placed close to the IC terminal pins.

9.2.2.3.5 Temperature Output

For the bq3055 device, TS1 and TS2 provide thermistor drive-under program control (Figure 18). Each pin can be enabled with an integrated 18-kΩ (typical) linearization pullup resistor to support the use of a 10-kΩ at 25°C (103) NTC external thermistor, such as a Mitsubishi BN35-3H103. The reference design includes two 10-kΩ thermistors: RT1 and RT2.

Figure 18. Thermistor Drive

9.2.2.4.1 Cell Inputs

An input filter is provided for each cell input. This comprises the resistors R5, R6, R7, and R9 along with capacitors C5, C6, C7, and C8 (Figure 19). This input network is completely independent of the filter network used as input to thebq3055. To ensure independent safety functionality, the two devices must have separate input filters.

Because the filter capacitors are implemented differentially, a low-voltage device can be used in each case.

Figure 19. bq29705 Cell Inputs and Time-Delay Capacitor

9.2.2.4.2 Time-Delay Capacitor

C10 sets the time delay for activation of the output after any cell exceeds the threshold voltage. The time delay is calculated as td = 1.2 V × DelayCap (μF)/0.18 μA.