米6体育平台手机版

ZHCSC37A February 2014 – July 2014

PRODUCTION DATA.

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机械数据 (封装 | 引脚)

YFP|42
- MXBG339A

散热焊盘机械数据 (封装 | 引脚)

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8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted)⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
Input voltage	AC1, AC2	–0.8	20	V
	RECT, COMM1, COMM2, OUT, LPRB1, LPRB2, CLAMP1, CLAMP2, WPG, PD_DET	–0.3	20
	AD, AD-EN	–0.3	30
	BOOT1, BOOT2	–0.3	20
	SCL, SDA, TERM, CM_ILIM, FOD, TS/CTRL, ILIM, TMEM, VIREG, VO_REG, LPRBEN	–0.3	7
Input current	AC1, AC2 (RMS)	2.5		A
Output current	OUT	1.5		A
Output sink current	LPRB1, LPRB2	15		mA
Output sink current	COMM1, COMM2	1		A
T_J	junction temperature	–40	150	°C

(1) All voltages are with respect to the PGND pin, unless otherwise noted.

(2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

8.2 Handling Ratings

			MIN	MAX	UNIT
T_stg	Storage temperature		–65	150	°C
V_(ESD)⁽¹⁾	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽²⁾, 100 pF, 1.5 kΩ	–2	2	kV
V_(ESD)⁽¹⁾	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽³⁾	–500	500	V

(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in to the device.

(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_RECT	RECT voltage range	4	10	V
I_OUT	Output current		1	A
I_AD-EN	Sink current		1	mA
I_COMM	COMMx sink current		500	mA
T_J	Junction temperature	0	125	ºC

8.4 Thermal Information

THERMAL METRIC⁽¹⁾		bq51221	UNIT
THERMAL METRIC⁽¹⁾		YFP (42 Pins)	UNIT
R_θJA	Junction-to-ambient thermal resistance⁽²⁾	49.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance⁽³⁾	0.2
R_θJB	Junction-to-board thermal resistance⁽⁴⁾	6.1
ψ_JT	Junction-to-top characterization parameter⁽⁵⁾	1.4
ψ_JB	Junction-to-board characterization parameter⁽⁶⁾	6
R_θJC(bot)	Junction-to-case (bottom) thermal resistance⁽⁷⁾	N/A

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a.

(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8.

(5) The junction-to-top characterization parameter, ψ_JT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining R_θJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6) The junction-to-board characterization parameter, ψ_JB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining R_θJA, using a procedure described in JESD51-2a (sections 6 and 7).

(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

8.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted), I_LOAD = I_OUT

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_UVLO	Undervoltage lockout	V_RECT: 0 to 3 V		2.8	2.9	V
V_HYS-UVLO	Hysteresis on UVLO	V_RECT: 3 to 2 V		393		mV
V_RECT-OVP	Input overvoltage threshold	V_RECT: 5 to 16 V	14.6	15.1	15.6	V
V_HYS-OVP	Hysteresis on OVP	V_RECT: 16 to 5 V		1.5		V
V_RECT(REG)	Voltage at RECT pin set by communication with primary		V_OUT + 0.12		V_OUT + 2	V
V_RECT(TRACK)	V_RECT regulation above V_OUT	V_ILIM = 1.2 V		140		mV
I_LOAD-HYS	I_LOAD hysteresis for dynamic V_RECT thresholds as a % of I_ILIM	I_LOADfalling		4%
V_RECT-DPM	Rectifier under voltage protection, restricts I_OUT at V_RECT-DPM		3	3.1	3.2	V
V_RECT-REV	Rectifier reverse voltage protection with a supply at the output	V_RECT-REV = V_OUT – V_RECT, V_OUT = 10 V		8.8	9.2	V
I_LPRB1-dis	Current at which LPRB1 is disabled	I_OUT 0 to 200 mA		125		mA
I_LPRB2-dis	Current at which LPRB2 is disabled	I_OUT 0 to 400 mA		322		mA
QUIESCENT CURRENT
I_OUT(standby)	Quiescent current at the output when wireless power is disabled	V_OUT ≤ 5 V, 0°C ≤ T_J ≤ 85°C		20	35	µA
ILIM SHORT CIRCUIT
R_ILIM-SHORT	Highest value of R_ILIM resistor considered a fault (short). Monitored for I_OUT > 100 mA	R_ILIM: 200 to 50 Ω. I_OUT latches off, cycle power to reset		215	230	Ω
t_DGL-Short	Deglitch time transition from ILIM short to I_OUT disable			1		ms
I_{LIM_SC}	I_LIM-SHORT,OK enables the ILIM short comparator when I_OUT is greater than this value	I_LOAD: 0 to 200 mA	110	125	140	mA
I_{LIM-SHORT,OK HYSTERESIS}	Hysteresis for I_LIM-SHORT,OK comparator	I_LOAD: 200 to 0 mA		20		mA
I_OUT-CL	Maximum output current limit	Maximum I_LOAD that can be delivered for 1 ms when ILIM is shorted		3.7		A
OUTPUT
V_{O_REG}	Feedback voltage set point	I_LOAD = 1000 mA	0.495	0.5013	0.5075	V
V_{O_REG}	Feedback voltage set point	I_LOAD = 1 mA	0.4951	0.5014	0.5076	V
K_ILIM	Current programming factor for hardware short circuit protection	R_ILIM = K_ILIM / I_ILIM, where I_ILIM is the hardware current limit I_OUT = 850 mA		842		AΩ
I_{OUT_RANGE}	Current limit programming range				1500	mA
I_COMM	Output current limit during communication	I_OUT ≥ 400 mA		I_OUT – 50		mA
		100 mA ≤ I_OUT < 400 mA		I_OUT + 50
		I_OUT < 100 mA		None
t_HOLD-OFF	Hold off time for the communication current limit during startup			1		s
TS/CTRL
V_TS-Bias	TS bias voltage (internal)	I_TS-Bias < 100 µA and communication is active (periodically driven, see t_TS/CTRL-Meas)		1.8		V
V_CTRL-HI	CTRL pin threshold for a high	V_TS/CTRL: 50 to 150 mV	90	105	120	mV
T_TS/CTRL-Meas	Time period of TS/CTRL measurements, when TS is being driven	TS bias voltage is only driven when power packets are sent			1700	ms
V_TS-HOT	Voltage at TS pin when device shuts down			0.38		V
THERMAL PROTECTION
T_J(OFF)	Thermal shutdown temperature			155		°C
T_J(OFF-HYS)	Thermal shutdown hysteresis			20		°C
OUTPUT LOGIC LEVELS ON WPG
V_OL	Open drain WPG pin	I_SINK = 5 mA			550	mV
I_OFF,STAT	WPG leakage current when disabled	V_WPG = 20 V			1	µA
COMM PIN
R_DS-ON(COMM)	COMM1 and COMM2	V_RECT = 2.6 V		1		Ω
ƒ_COMM	Signaling frequency on COMMx pin for WPC			2.00		Kb/s
I_OFF,COMM	COMMx pin leakage current	V_COMM1 = 20 V, V_COMM2 = 20 V			1	µA
CLAMP PIN
R_DS-ON(CLAMP)	CLAMP1 and CLAMP2			0.5		Ω
ADAPTER ENABLE
V_AD-EN	V_AD rising threshold voltage	V_AD 0 V to 5 V	3.5	3.6	3.8	V
V_AD-EN-HYS	V_AD-EN hysteresis	V_AD 5 V to 0 V		450		mV
I_AD	Input leakage current	V_RECT = 0 V, V_AD = 5 V			50	μA
R_{AD_EN-OUT}	Pullup resistance from AD-EN to OUT when adapter mode is disabled and V_OUT > V_AD	V_AD = 0 V, V_OUT = 5 V		230	350	Ω
V_{AD_EN-ON}	Voltage difference between V_AD and V_AD-EN when adapter mode is enabled	V_AD = 5 V, 0°C ≤ T_J ≤ 85°C	4	4.5	5	V
V_{AD_EN-ON}		V_AD = 9 V, 0°C ≤ T_J ≤ 85°C	3	6	7	V
SYNCHRONOUS RECTIFIER
I_SYNC-EN	I_OUT at which the synchronous rectifier enters half synchronous mode	I_OUT: 200 mA to 0 mA		100		mA
I_SYNC-EN-HYST	Hysteresis for I_OUT,RECT-EN (full-synchronous mode enabled)	I_OUT 0 mA to 200 mA		40		mA
V_HS-DIODE	High-side diode drop when the rectifier is in half synchronous mode	I_AC-VRECT = 250 mA, and T_J = 25°C		0.7		V
I²C
V_IL	Input low threshold level SDA	V(PULLUP) = 1.8 V, SDA			0.4	V
V_IH	Input high threshold level SDA	V(PULLUP) = 1.8 V, SDA	1.4			V
V_IL	Input low threshold level SCL	V(PULLUP) = 1.8 V, SCL			0.4	V
V_IH	Input high threshold level SCL	V(PULLUP) = 1.8 V, SCL	1.4			V
I²C speed		Typical		100		kHz

8.6 Typical Characteristics

Temperature = 25°C (unless otherwise noted)

Figure 1. Output Voltage Feedback as a Function of Load

Figure 3. K_ILIM as a Function of Load Current

Register 0x01 (B0, B1, B2) Table 5
	1-mA Load

Figure 5. Register 0x01 control of V_{O_REG}

Figure 2. Quiescent Current as a Function of Output Voltage

Figure 4. V_UVLO as a Function of Junction Temperature

Register 0x01 (B0, B1, B2) Table 5
	1-A Load

Figure 6. Register 0x01 control of V_{O_REG}