Each BQ769x0 device provides two low-side FET drivers, CHG and DSG, which control NCH power FETs or may be used as a signal to enable various other circuits such as a high-side NCH charge pump circuit.

Both DSG and CHG drivers have a fast pull-up to nominally 12 V when enabled. DSG uses a fast pull-down to VSS when disabled, while CHG utilizes a high impedance (nominally 1 MΩ) pull-down path when disabled.

An additional internal clamp circuit ensures that the CHG pin does not exceed a maximum of 20 V.

Figure 8-2 CHG and DSG FET Circuit

The power path for the CHG and DSG pull-up circuit originates from the REGSRC pin, instead of BAT.

To enable the CHG fet, set the [CHG_ON] register bit to 1; to disable, set [CHG_ON] = 0. The discharge FET may be similarly controlled through the [DSG_ON] register bit.

Certain fault conditions or power state transitions will clear the state of the CHG/DSG FET controls. Table 8-1 shows what action, if any, to take to [CHG_ON] and [DSG_ON] in response to various system events: