ZHCSJM7 April 2019 BQ79606A-Q1
PRODUCTION DATA.
In the following example, an 8-bit read to the SPI slave done (0x3B is expected result). The slave has an active-low chip select with a (CPOL, CPHA) requirement of (0,0).
| Transaction | Register | Data | Comments |
|---|---|---|---|
| Write | SPI_CFG | 0x08 | SS low (start transaction), CPOL and CPHA = 0, SPI enabled, 8-bit transaction |
| Write | SPI_EXE | 0x01 | Execute read (0X3B received on the MISO input) |
| -- | SPI_RX | 0x3B | Updated by SPI |
| Write | SPI_CFG | 0x18 | SS high (stops transaction) |
| Read | SPI_RX | -- | Read the result of the SPI read |
In the following example, an 12-bit read to the SPI slave done (0x73B is expected result). The slave has an active-low chip select with a (CPOL, CPHA) requirement of (0,0).
| Transaction | Register | Data | Comments |
|---|---|---|---|
| Write | SPI_CFG | 0x08 | SS low (start transaction), CPOL and CPHA = 0, SPI enabled, 8-bit transaction |
| Write | SPI_EXE | 0x01 | Execute read (0X3B received on the MISO input) |
| -- | SPI_RX | 0x73 | Updated by SPI |
| Read | SPI_RX | -- | Read the result of the SPI read |
| Write | SPI_CFG | 0x0C | Configure 4-bit transaction |
| Write | SPI_EXE | 0x01 | Execute read (0x07 received on the MISO input) |
| -- | SPI_RX | 0x0B | Lower 4-bits updated by SPI |
| Write | SPI_CFG | 0x18 | SS high (stops transaction) |
| Read | SPI_RX | -- | Read the result of the SPI read |