9.2.1.2.13.2 Auto Addressing

Prior to using the Auto-Addressing function in a stack, all devices must be awake and ready for communication. The steps necessary for this state are detailed elsewhere in this document, but typically require a few milliseconds per device (t_SU(WAKE)). Very simple "stacks" consisting of a single device may use address 0x00 (or any other valid address) for the device. The first device in stacks of more than one device may also use Address 0x00.

When CONFIG[GPIO_ADD_SEL] = 0 and CONTROL1[ADD_WRITE_EN] is set , the device enters automatic addressing mode. In this mode, the device turns off the daisy-chain transmitters for one frame (so the next frame received is not propagated to the next device) and enables writes to DEVADD_USR[ADD]. The next frame sent must set the address. Once the next frame is received (this frame must be the address or it will save the address currently in the register), the CONTROL1[ADD_WRITE_EN] bit is self cleared and the address is not writeable. Additionally, the result is reflected in the DEV_ADD_STAT[ADD] bits indicating the address is updated. At this time, the user may write to the DEVADD_OTP[ADD] bits to save the address, or the addressing may be done as part of the initialization process. When the CONTROL1[ADD_WRITE_EN] bit is self cleared, the transmitter is turned on. This allows the host to use a Broadcast write transaction and only affect the one part waiting for an address. To auto-address the stack of BQ79606A-Q1 devices, use the following procedure (assumes CONFIG[GPIO_ADD_SEL] = 0 in the OTP):

1. Broadcast write CONTROL1[ADD_WRITE_EN] = 1
2. Broadcast write consecutive addresses to DEVADD_USR[ADD] until all parts have been assigned a valid address.
3. Single device write "0x00" to the base device to set the as BASE device in the CONFIG[STACK_DEV] register bit.
4. Single device write "0x02" to to all devices except the top and bottom of stack to set them as stack devices in the CONFIG[STACK_DEV] register bit..
5. Single device write "0x03" to the top device in the stack to set the CONFIG[TOP_STACK] bit and update the CRC for that device

Good practice dictates that all devices be checked by reading back their address registers, at a minimum, to establish that the addressing functions worked properly. Subsequent reading and writing depend on correctly addressed devices in the stack or executing any customer-initiated tests, such as the checksum test.