ZHCSTD7A December 2021 – November 2023 BQ79631-Q1
PRODUCTION DATA
VS voltage measurement path comparison:
The VS voltage measurement check is performed by comparing the prefiltered measurement result from Main ADC versus measurement result from AUX ADC. To read the compared value measured by Main ADC and AUX ADC, MCU has to set up this diagnostic check to lock on a single channel using [AUX_IN_SEL] setting and the start this diagnostic check. In this configuration, the compared values from Main ADC and AUX ADC are reported to DIAG_MAIN_HI/LO registers and DIAG_AUX_HI/LO registers respectively.
Both Main and AUX ADC has the same front end filters. This diagnostic time is mostly spend on waiting for the AAF on the AUX ADC path to settle. The [AUX_SETTLE] setting allows the MCU to make trade-off between diagnostic time and noise filter level. Additionally, when AUX ADC starts, by default, AUX slot always align to the Main ADC VS1 slot. The [AUX_IN_ALIGN] setting allows MCU to change this alignment to Main ADC VS8 slot, resulting with less sampling time delta between Main and AUX ADC on the higher channels. The device does not do on-chip measurement check for SRP/SRN signal.
Before starting the voltage measurement comparison between VS and AUX, host ensures:
To start the VS and AUX voltage measurement comparison:
Host checks the FAULT_COMP_VSAUX1 and FAULT_COMP_VSAUX2 registers for the comparison result.
ADC comparison abort conditions:
The device will not start the VS voltage measurement comparison under the invalid conditions listed below. When the comparison is aborted, the FAULT_COMP_MISC[COMP_ADC_ABORT] = 1, [DRDY_AUX_IN] = 1, [DRDY_VSAUX] = 1, and FAULT_COMP_VSAUX1/2 registers = 0xFF. If [AUX_IN_SEL4:0] is set to locked at a single channel, the AUX_IN_HI/LO registers will be reset to default value 0x8000 if the comparison run is aborted.
Invalid conditions or settings which will prevent the start of the VS voltage measurement comparison:
Post-ADC digital LPF check:
The digital LPF is checked continuous whenever the Main ADC is running. A duplicate diagnostic LPF is implemented to check against each LPF for each VS channel and the CSAUX channel. The check is performed with one LPF at a time.
Example, to test LPF1 for VS1, the input (that is, ADC measurement result from VS1) is fed to the LPF1 and the diagnostic LPF for a period of time. The output of the LPF1 and the diagnostic LPF are compared against each other. Several outputs from LPF1 and diagnostic LPF will be compared to ensure the operation of the LFP1 before moving to check the next LFP. If any of the LPFs fail the diagnostic check, FAULT_COMP_MISC[LPF_FAIL] = 1.
When the LPF for each VS channel is tested once, ADC_STAT2[DRDY_LPF] = 1. This diagnostic check of the LPFs will continuously run in the background as long as the Main ADC is running.
Furthermore, the device also implements a check to verify the functionality of the diagnostic LPF itself. By setting DIAG_COMP_CTRL4[LPF_FAULT_INJ] = 1 and restarting the Main ADC, the device will inject a fault into the diagnostic LPF, forcing a failure during the LPF diagnostic check which then sets the [LPF_FAIL] = 1. When the test is completed, simply set the [LPF_FAULT_INJ] = 0.