ZHCSTD7A December 2021 – November 2023 BQ79631-Q1
PRODUCTION DATA
| Address | 0x0337 | |||||||
| RW | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
| Name | RSVD | BIST_NO_ RST | PWR_BIST_ GO | |||||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| RSVD = | Reserved | |||||||
| BIST_NO_RST = | Use for further diagnostic if the power supply BIST detects a failure. When this bit is set to 1, the device will either run a force pass or force fail BIST cycle based on the [BIST_FORCE_FAIL] setting and will not clear the FAULT_PWR1 register, and the FAULT_PWR2 register does not deassert the NFAULT signal. 0 = Cycle through the force pass and force fail BIST on the LDO comparators. The FAULT_PWR1 and FAULT_PWR2 registers are reset to 0 and NFAULT is deasserted at the end of each LDO BIST run. 1 = Only run the force pass or force fail cycle based on the [BIST_FORCE_FAIL] setting. The FAULT_PWR1 and FAULT_PWR2 registers are not reset to 0, and NFAULT remains asserted at the end of each LDO BIST run. | |||||||
| PWR_BIST_GO = | When written to 1, the power supply BIST diagnostic will start. Any change [BIST_NO_CLR] or [BIST_FORCE_FAULT] has no effect until this bit is written to 1 again. The bit self-clears. 0 = Ready 1 = Start power supply BIST diagnostic | |||||||