ZHCS416F August   2011  – October 2014 CC1175

PRODUCTION DATA.  

  1. 1 器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 功能方框图
  2. 2修订历史记录
  3. 3Terminal Configuration and Functions
    1. 3.1 Pin Diagram
    2. 3.2 Pin Configuration
  4. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  Handling Ratings
    3. 4.3  Recommended Operating Conditions (General Characteristics)
    4. 4.4  Thermal Resistance Characteristics for RHB Package
    5. 4.5  RF Characteristics
    6. 4.6  Regulatory Standards
    7. 4.7  Current Consumption, Static Modes
    8. 4.8  Current Consumption, Transmit Modes
      1. 4.8.1 950-MHz Band (High-Performance Mode)
      2. 4.8.2 868-, 915-, and 920-MHz Bands (High-Performance Mode)
      3. 4.8.3 434-MHz Band (High-Performance Mode)
      4. 4.8.4 169-MHz Band (High-Performance Mode)
      5. 4.8.5 Low-Power Mode
    9. 4.9  Transmit Parameters
    10. 4.10 PLL Parameters
      1. 4.10.1 High-Performance Mode
      2. 4.10.2 Low-Power Mode
    11. 4.11 Wake-up and Timing
    12. 4.12 High-Speed Crystal Oscillator
    13. 4.13 High-Speed Clock Input (TCXO)data to TCXO table
    14. 4.14 32-kHz Clock Input
    15. 4.15 Low-Speed RC Oscillator
    16. 4.16 I/O and Reset
    17. 4.17 Temperature Sensor
    18. 4.18 Typical Characteristics
  5. 5Detailed Description
    1. 5.1 Block Diagram
    2. 5.2 Frequency Synthesizer
    3. 5.3 Transmitter
    4. 5.4 Radio Control and User Interface
    5. 5.5 Low-Power and High-Performance Modes
  6. 6Typical Application Circuit
  7. 7器件和文档支持
    1. 7.1 器件支持
      1. 7.1.1 开发支持
        1. 7.1.1.1 配置软件
      2. 7.1.2 器件和支持开发工具命名规则
    2. 7.2 文档支持
    3. 7.3 社区资源
    4. 7.4 商标
    5. 7.5 静电放电警告
    6. 7.6 术语表
  8. 8机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

3 Terminal Configuration and Functions

3.1 Pin Diagram

Figure 3-1 shows pin names and locations for the CC1175 device.

po_swrs116.gifFigure 3-1 Package 5-mm × 5-mm QFN

3.2 Pin Configuration

The following table lists the pin-out configuration for the CC1175 device.

PIN NO. PIN NAME TYPE / DIRECTION DESCRIPTION
1 VDD_GUARD Power 2.0–3.6 V VDD
2 RESET_N Digital input Asynchronous, active-low digital reset
3 GPIO3 Digital I/O General-purpose I/O
4 GPIO2 Digital I/O General-purpose I/O
5 DVDD Power 2.0–3.6 VDD to internal digital regulator
6 DCPL Power Digital regulator output to external decoupling capacitor
7 SI Digital input Serial data in
8 SCLK Digital input Serial data clock
9 SO(GPIO1) Digital I/O Serial data out (general-purpose I/O)
10 GPIO0 Digital I/O General-purpose I/O
11 CSn Digital input Active-low chip select
12 DVDD Power 2.0–3.6 V VDD
13 AVDD_IF Power 2.0–3.6 V VDD
14 RBIAS Analog External high-precision resistor
15 AVDD_RF Power 2.0–3.6 V VDD
16 N.C. Not connected
17 PA Analog Single-ended TX output (requires DC path to VDD)
18 N.C. Not connected
19 GND1 Analog Analog ground
20 GND0 Analog Analog ground
21 DCPL_VCO Power Pin for external decoupling of VCO supply regulator
22 AVDD_SYNTH1 Power 2.0–3.6 V VDD
23 LPF0 Analog External loop filter components
24 LPF1 Analog External loop filter components
25 AVDD_PFD_CHP Power 2.0–3.6 V VDD
26 DCPL_PFD_CHP Power Pin for external decoupling of PFD and CHP regulator
27 AVDD_SYNTH2 Power 2.0–3.6 V VDD
28 AVDD_XOSC Power 2.0–3.6 V VDD
29 DCPL_XOSC Power Pin for external decoupling of XOSC supply regulator
30 XOSC_Q1 Analog Crystal oscillator pin 1 (must be grounded if a TCXO or other external clock connected to EXT_XOSC is used)
31 XOSC_Q2 Analog Crystal oscillator pin 2 (must be left floating if a TCXO or other external clock connected to EXT_XOSC is used)
32 EXT_XOSC Digital input Pin for external clock input (must be grounded if a regular crystal connected to XOSC_Q1 and XOSC_Q2 is used)
– GND Ground pad The ground pad must be connected to a solid ground plane.
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