ZHCSIL5F July 2018 – February 2021 CC1352P
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
For general design guidelines and hardware configuration guidelines, refer to the CC13xx/CC26xx Hardware Configuration and PCB Design Considerations Application Report.
For optimum RF performance, especially when using the high-power PA, it is important to accurately follow the reference design with respect to component values and layout. Failure to do so may lead to reduced RF performance due to balun mismatch. The amplitude- and phase balance through the balun must be <1 dB and <6 degrees, respectively.
PCB stack-up is also critical for proper operation. The CC1352P EVMs and characterization boards are using a finished thickness between the top layer (RF signals) and layer 2 (ground plane) of 175 µm. It is very important to use the same substrate thickness, or slightly thicker, in an end product implementing the CC1352P device.