ZHCSSJ3A december 2022 – june 2023 CC1354P10
ADVANCE INFORMATION
The SPI interface provides a standardized synchronous serial interface to communicate with devices compatible with SPI (3 and 4 wire), MICROWIRE and TI Synchronous Serial Format. The SPIs support master/slave operation up to 12 MHz, programmable clock bit rate with prescaler, as well as configurable phase and polarity.
The UART interface implements universal asynchronous receiver and transmitter functions. The UART supports flexible baud-rate generation up to a maximum of 3 Mbps with FIFO, multiple data sizes, stop and parity bits as well as hardware handshake.
The I2S interface provides a standardized interface to exchange digital audio with devices compatible with this standard, including ADCs, DACs and CODECs. The I2S can also receive pulse-density modulation (PDM) data from devices such as digital microphones and perform conversion to PCM data.
The I2C interface enables low speed serial communications with devices compatible with the I2C standard. The I2C interface can handle both standard (100 kHz) and fast (400 kHz) speeds, as well as four modes of operation: master transmit/receive and slave transmit/receive.
The I/O controller (IOC) controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a programmable pullup and pulldown function, and can generate an interrupt on a negative or positive edge (configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs have high-drive capabilities, which are marked in bold in Section 7. All digital peripherals can be connected to any digital pin on the device.