ZHCSSA2E April 2023 – September 2024 CC2340R2 , CC2340R5
PRODMIX
A large selection of timers are available as part of the CC2340R device. These timers are:
The RTC is a 67-bit, 2-channel timer running on the LFCLK system clock. The RTC is active in STANDBY and ACTIVE power states. When the device enters the RESET or SHUTDOWN state the RTC is reset.
The RTC accumulates time elapsed since reset on each LFCLK. The RTC counter is incremented by LFINC at a rate of 32.768kHz. LFINC indicates the period of LFCLK in μs, with an additional granularity of 16 fractional bits.
The counter can be read from two 32-bit registers. RTC.TIME8U has a range of approximately 9.5 hours with an LSB representing 8 microseconds. RTC.TIME524M has a range of approximately 71.4 years with an LSB representing 524 milliseconds.
There is hardware synchronization between the system timer (SYSTIM) and the RTC so that the multichannel and higher resolution SYSTIM remains in synchronization with the RTC’s time base.
The RTC has two channels: one compare channel and one capture channel and is capable of waking the device out of the standby power state. The RTC compare channel is typically used only by system software and only during the standby power state.
For software convenience, a hardware synchronization mechanism automatically ensures that the RTC and SYSTIM share a common time base (albeit with different resolutions/spans). Another software convenience feature is that SYSTIM qualifies any submitted compare values so that the timer channel will immediately trigger if the submitted event is in the immediate past (4.294s with 1μs resolution and 1.049s with 250ns resolution).
The CC2340R device provides up to four LGPTs with 3 × 16 bit timers and 1× 24 bit timer, all running up to 48MHz. The LGPTs support a wide range of features such as:
The timer capture/compare and PWM signals are connected to IOs through the IO controller module (IOC) and the internal timer event connections to CPU, DMA, and other peripherals are through the event fabric, which allows the timers to interact with signals such as GPIO inputs, other timers, DMA and ADC. Two LGPTs (2× 16-bit timers) support quadrature decoder mode to enable buffered decoding of quadrature-encoded sensor signals. The LGPTs are available in device Active and Idle power modes.
Feature | Timer 0 | Timer 1 | Timer 2 | Timer 3 |
---|---|---|---|---|
Counter Width | 16-bit | 16-bit | 16-bit | 24-bit |
Quadrature Decoder | Yes | No | Yes | No |
Park Mode on Fault | No | Yes | No | No |
Programmable Dead-Band Insertion | No | Yes | No | No |
Part Number | Timer 0 | Timer 1 | Timer 2 | Timer 3 |
---|---|---|---|---|
CC2340R21 | Yes | Yes | No | No |
CC2340R22 | Yes | Yes | Yes | Yes |
CC2340R52 | Yes | Yes | Yes | Yes |
CC2340R53 | Yes | Yes | Yes | Yes |
The watchdog timer is used to regain control if the system operates incorrectly due to software errors. Upon counter expiry, the watchdog timer resets the device when periodic monitoring of the system components and tasks fails to verify proper functionality. The watchdog timer runs on a 32kHz clock rate and operates in device active, idle, and standby modes and cannot be stopped once enabled.