米6体育平台手机版

ZHCSJF3D February 2019 – February 2021 CC2652RB

PRODUCTION DATA

请参考 PDF 数据表获取器件具体的封装图。

T_c = 25 °C, V_DDS = 3.0 V, unless otherwise noted.

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
Input voltage range		0		V_DDS	V
Clock frequency			SCLK_LF
Internal reference voltage⁽¹⁾	Using internal DAC with VDDS as reference voltage, DAC code = 0 - 255		0.024 - 2.865		V
Offset	Measured at V_DDS / 2, includes error from internal DAC		±5		mV
Decision time	Step from –50 mV to 50 mV		1		Clock Cycle

(1) The comparator can use an internal 8 bits DAC as its reference. The DAC output voltage range depends on the reference voltage selected. See GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000175174.html#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000175174