The 3-wire UART topology requires only the following lines (see Figure 8-20):

• RX
• TX
• CTS

Figure 8-20 3-Wire UART Topology

Using this topology requires meeting one of the following conditions:

• The host always stays awake or active.
• The host goes to sleep but the UART module has receiver start-edge detection for auto-wake-up and does not lose data.
• The host can always receive any amount of data transmitted by the SimpleLink™ device because there is no flow control in this direction.

Because there is no full flow control, the host cannot stop the SimpleLink™ device to send its data; thus, the following parameters must be carefully considered:

• Maximum baud rate
• RX character interrupt latency and low-level driver jitter buffer
• Time consumed by the user's application