米6体育平台手机版

ZHCSGZ7E March 2017 – May 2021 CC3220MOD , CC3220MODA

PRODUCTION DATA

请参考 PDF 数据表获取器件具体的封装图。

Figure 8-11 shows the timing diagram for the I2S receive mode.

Figure 8-11 I2S Receive Mode Timing Diagram

Table 8-7 lists the timing parameters for the I2S receive mode.

Table 8-7 I2S Receive Mode Timing Parameters

ITEM	NAME	DESCRIPTION	MAX	UNIT
T1	f_clk⁽¹⁾	Clock frequency	9.216	MHz
T2	t^LP⁽¹⁾	Clock low period	1/2 f_clk	ns
T3	t_HT⁽¹⁾	Clock high period	1/2 f_clk	ns
T4	t_OH⁽¹⁾	RX data hold time	0	ns
T5	t_OS⁽¹⁾	RX data setup time	15	ns

(1) Timing parameter assumes a maximum load of 20 pF.