米6体育平台手机版

ZHCSGZ7E March 2017 – May 2021 CC3220MOD , CC3220MODA

PRODUCTION DATA

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

MON|63

散热焊盘机械数据 (封装 | 引脚)

7.2.1 Module Pin Attributes

MODULE PIN		TYPE^⁽¹⁾	CC3220 DEVICE PIN NO.	MODULE PIN DESCRIPTION
NO.	NAME	TYPE^⁽¹⁾	CC3220 DEVICE PIN NO.	MODULE PIN DESCRIPTION
1	GND	–	–	Ground
2	GND	–	–	Ground
3	GPIO10	I/O	1	GPIO^⁽²⁾
4	GPIO11	I/O	2	GPIO^⁽²⁾
5	GPIO14	I/O	5	GPIO^⁽²⁾
6	GPIO15	I/O	6	GPIO^⁽²⁾
7	GPIO16	I/O	7	GPIO^⁽²⁾
8	GPIO17	I/O	8	GPIO^⁽²⁾
9	GPIO12	I/O	3	GPIO^⁽²⁾
10	GPIO13	I/O	4	GPIO^⁽²⁾
11	GPIO22	I/O	15	GPIO^⁽²⁾
12	JTAG_TDI	I/O	16	JTAG TDI input. Leave unconnected if not used on product^⁽²⁾
13	FLASH_SPI_MISO	I	–	External Serial Flash Programming: SPI data in
14	FLASH_SPI_nCS_IN	I	–	External Serial Flash Programming: SPI chip select (active low)
15	FLASH_SPI_CLK	I	–	External Serial Flash Programming: SPI clock
16	GND	–	–	Ground
17	FLASH_SPI_MOSI	O	–	External Serial Flash Programming: SPI data out
18	JTAG_TDO	I/O	17	JTAG TDO output. Leave unconnected if not used on product^⁽¹⁾
19	GPIO28	I/O	18	GPIO^⁽²⁾
21	JTAG_TCK	I/O	19	JTAG TCK input. Leave unconnected if not used on product.^⁽²⁾
22	JTAG_TMS	I/O	20	JTAG TMS input. Leave unconnected if not used on product.^⁽²⁾
23	SOP2	–	21	See Section 9.9.1 for SOP[2:0] configuration modes.
24	SOP1	–	34	See Section 9.9.1 for SOP[2:0] configuration modes.
25	ANT_SEL1	I/O	29	Antenna selection control^⁽²⁾
26	ANT_SEL2	I/O	30	Antenna selection control^⁽²⁾
27	GND	–	–	Ground
28	GND	–	–	Ground
30	GND	–	–	Ground
31	RF_BG	I/O	31	2.4-GHz RF input/output
32	GND	–	–	Ground
34	SOP0	–	35	See Section 9.9.1 for SOP[2:0] configuration modes.
35	nRESET	I	32	There is an internal, 100 kΩ, pull-up resistor option from the nRESET pin to VBAT_RESET. Note: VBAT_RESET is not connected to VBAT1 or VBAT2 within the module. The following connection schemes are recommended: Connect nRESET to a switch, external controller, or host, only if nRESET will be in a defined state under all operating conditions. Leave VBAT_RESET unconnected to save power. If nRESET cannot be in a defined state under all operating conditions, connect VBAT_RESET to the main module power supply (VBAT1 and VBAT2). Due to the internal pull-up resistor a leakage current of 3.3 V / 100 kΩ is expected.
36	VBAT_RESET	–	37
37	VBAT1	Power	39	Power supply for the module, must be connected to battery (2.3 V to 3.6 V)
38	GND	–	–	Ground
40	VBAT2	Power	10, 44, 54	Power supply for the module, must be connected to battery (2.3 V to 3.6 V)
42	GPIO30	I/O	53	GPIO^⁽²⁾
43	GND	–	–	Ground
44	GPIO0	I/O	50	GPIO^⁽²⁾
46	GPIO1	I/O	55	GPIO^⁽²⁾
47	GPIO2	I/O	57	GPIO^⁽²⁾
48	GPIO3	I/O	58	GPIO^⁽²⁾
49	GPIO4	I/O	59	GPIO^⁽²⁾
50	GPIO5	I/O	60	GPIO^⁽²⁾
51	GPIO6	I/O	61	GPIO^⁽²⁾
52	GPIO7	I/O	62	GPIO^⁽²⁾
53	GPIO8	I/O	63	GPIO^⁽²⁾
54	GPIO9	I/O	64	GPIO^⁽²⁾
55	GND	–	–	Thermal ground
56	GND	–	–	Thermal ground
57	GND	–	–	Thermal ground
58	GND	–	–	Thermal ground
59	GND	–	–	Thermal ground
60	GND	–	–	Thermal ground
61	GND	–	–	Thermal ground
62	GND	–	–	Thermal ground
63	GND	–	–	Thermal ground

(1) I = input; O = output; I/O = bidirectional

(2) For pin multiplexing details, see Table 7-3.