CC3220x provides an interface between a local host (LH), such as an MCU and an SD memory card, and handles SD transactions with minimal LH intervention.

The SD host does the following:

• Provides SD card access in 1-bit mode
• Deals with SD protocol at the transmission level
• Handles data packing
• Adds cyclic redundancy checks (CRC)
• Start and end bit
• Checks for syntactical correctness

The application interface sends every SD command and either polls for the status of the adapter or waits for an interrupt request. The result is then sent back to the application interface in case of exceptions or to warn of end-of-operation. The controller can be configured to generate DMA requests and work with minimum CPU intervention. Given the nature of integration of this peripheral on the CC3220x platform, TI recommends that developers use peripheral library APIs to control and operate the block. This section emphasizes understanding the SD host APIs provided in the peripheral library of the CC3220x Software Development Kit (SDK).

The SD Host features are as follows:

• Full compliance with SD command and response sets, as defined in the SD memory card
  • Specifications, v2.0
  • Includes high-capacity (size >2 GB) cards HC SD
• Flexible architecture, allowing support for new command structure.
• 1-bit transfer mode specifications for SD cards
• Built-in 1024-byte buffer for read or write
  • 512-byte buffer for both transmit and receive
  • Each buffer is 32-bits wide by 128-words deep
• 32-bit-wide access bus to maximize bus throughput
• Single interrupt line for multiple interrupt source events
• Two slave DMA channels (1 for TX, 1 for RX)
• Programmable clock generation
• Integrates an internal transceiver that allows a direct connection to the SD card without external transceiver
• Supports configurable busy and response timeout
• Support for a wide range of card clock frequency with odd and even clock ratio
• Maximum frequency supported is 24 MHz