ZHCSOT4C February   2020  – December 2024 CC3230S , CC3230SF

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. 功能方框图
  6. Device Comparison
    1. 5.1 Related Products
  7. Terminal Configuration and Functions
    1. 6.1 Pin Diagram
    2. 6.2 Pin Attributes
      1. 6.2.1 Pin Descriptions
    3. 6.3 Signal Descriptions
      1.      13
    4. 6.4 Pin Multiplexing
    5. 6.5 Drive Strength and Reset States for Analog and Digital Multiplexed Pins
    6. 6.6 Pad State After Application of Power to Device, Before Reset Release
    7. 6.7 Connections for Unused Pins
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Power-On Hours (POH)
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Current Consumption Summary (CC3230S)
      1.      24
    6. 7.6  Current Consumption Summary (CC3230SF)
      1.      26
    7. 7.7  TX Power Control
    8. 7.8  Brownout and Blackout Conditions
    9. 7.9  Electrical Characteristics for GPIO Pins
      1. 7.9.1 Electrical Characteristics: GPIO Pins Except 29, 30, 50, 52, and 53
      2. 7.9.2 Electrical Characteristics: GPIO Pins 29, 30, 50, 52, and 53
    10. 7.10 Electrical Characteristics for Pin Internal Pullup and Pulldown
      1.      33
    11. 7.11 WLAN Receiver Characteristics
      1.      35
    12. 7.12 WLAN Transmitter Characteristics
      1.      37
    13. 7.13 WLAN Transmitter Out-of-Band Emissions
      1. 7.13.1 WLAN Filter Requirements
    14. 7.14 BLE/2.4 GHz Radio Coexistence and WLAN Coexistence Requirements
    15. 7.15 Thermal Resistance Characteristics for RGK Package
    16. 7.16 Timing and Switching Characteristics
      1. 7.16.1 Power Supply Sequencing
      2. 7.16.2 Device Reset
      3. 7.16.3 Reset Timing
        1. 7.16.3.1 nRESET (32-kHz Crystal)
        2. 7.16.3.2 First-Time Power-Up and Reset Removal Timing Requirements (32-kHz Crystal)
        3. 7.16.3.3 nRESET (External 32-kHz Clock)
          1. 7.16.3.3.1 First-Time Power-Up and Reset Removal Timing Requirements (External 32-kHz Clock)
      4. 7.16.4 Wakeup From HIBERNATE Mode
      5. 7.16.5 Clock Specifications
        1. 7.16.5.1 Slow Clock Using Internal Oscillator
        2. 7.16.5.2 Slow Clock Using an External Clock
          1. 7.16.5.2.1 External RTC Digital Clock Requirements
        3. 7.16.5.3 Fast Clock (Fref) Using an External Crystal
          1. 7.16.5.3.1 WLAN Fast-Clock Crystal Requirements
        4. 7.16.5.4 Fast Clock (Fref) Using an External Oscillator
          1. 7.16.5.4.1 External Fref Clock Requirements (–40°C to +85°C)
      6. 7.16.6 Peripherals Timing
        1. 7.16.6.1  SPI
          1. 7.16.6.1.1 SPI Master
            1. 7.16.6.1.1.1 SPI Master Timing Parameters
          2. 7.16.6.1.2 SPI Slave
            1. 7.16.6.1.2.1 SPI Slave Timing Parameters
        2. 7.16.6.2  I2S
          1. 7.16.6.2.1 I2S Transmit Mode
            1. 7.16.6.2.1.1 I2S Transmit Mode Timing Parameters
          2. 7.16.6.2.2 I2S Receive Mode
            1. 7.16.6.2.2.1 I2S Receive Mode Timing Parameters
        3. 7.16.6.3  GPIOs
          1. 7.16.6.3.1 GPIO Output Transition Time Parameters (Vsupply = 3.3 V)
            1. 7.16.6.3.1.1 GPIO Output Transition Times (Vsupply = 3.3 V) #GUID-761098ED-1DAD-4953-A730-5C228F39851B/SWAS03298470_ #GUID-761098ED-1DAD-4953-A730-5C228F39851B/SWAS0326310_
          2. 7.16.6.3.2 GPIO Input Transition Time Parameters
            1. 7.16.6.3.2.1 GPIO Input Transition Time Parameters
        4. 7.16.6.4  I2C
          1. 7.16.6.4.1 I2C Timing Parameters #GUID-45C79838-2E6C-4512-90E1-ED14EE3F93C2/SWAS0313060
        5. 7.16.6.5  IEEE 1149.1 JTAG
          1. 7.16.6.5.1 JTAG Timing Parameters
        6. 7.16.6.6  ADC
          1. 7.16.6.6.1 ADC Electrical Specifications
        7. 7.16.6.7  Camera Parallel Port
          1. 7.16.6.7.1 Camera Parallel Port Timing Parameters
        8. 7.16.6.8  UART
        9. 7.16.6.9  SD Host
        10. 7.16.6.10 Timers
  9. Detailed Description
    1. 8.1  Overview
    2. 8.2  Arm® Cortex®-M4 Processor Core Subsystem
    3. 8.3  Wi-Fi® Network Processor Subsystem
      1. 8.3.1 WLAN
      2. 8.3.2 Network Stack
    4. 8.4  Security
    5. 8.5  Power-Management Subsystem
    6. 8.6  Low-Power Operating Mode
    7. 8.7  Memory
      1. 8.7.1 External Memory Requirements
      2. 8.7.2 Internal Memory
        1. 8.7.2.1 SRAM
        2. 8.7.2.2 ROM
        3. 8.7.2.3 Flash Memory
        4. 8.7.2.4 Memory Map
    8. 8.8  Restoring Factory Default Configuration
    9. 8.9  Boot Modes
      1. 8.9.1 Boot Mode List
    10. 8.10 Hostless Mode
  10. Applications, Implementation, and Layout
    1. 9.1 Application Information
      1. 9.1.1 BLE/2.4 GHz Radio Coexistence
      2. 9.1.2 Antenna Selection
      3. 9.1.3 Typical Application
    2. 9.2 PCB Layout Guidelines
      1. 9.2.1 General PCB Guidelines
      2. 9.2.2 Power Layout and Routing
        1. 9.2.2.1 Design Considerations
      3. 9.2.3 Clock Interface Guidelines
      4. 9.2.4 Digital Input and Output Guidelines
      5. 9.2.5 RF Interface Guidelines
  11. 10Device and Documentation Support
    1. 10.1 第三方米6体育平台手机版_好二三四免责声明
    2. 10.2 Tools and Software
    3. 10.3 Firmware Updates
    4. 10.4 Device Nomenclature
    5. 10.5 Documentation Support
    6. 10.6 支持资源
    7. 10.7 Trademarks
    8. 10.8 静电放电警告
    9. 10.9 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Application

Figure 9-5 shows the schematic of the engine area for the CC3230x device in the wide-voltage mode of operation, and the optional RF implementations with BLE/2.4GHz coexistence. The corresponding bill-of-materials show in Table 9-1. For a full operation reference design, see the CC3235x SimpleLink™ and Internet of Things Hardware Design Files.

Note:

The Following guidelines are recommended for implementation of the RF design:

  • Ensure an RF path is designed with an impedance of 50Ω

    .

  • Tuning of the antenna impedance π matching network is recommended after manufacturing of the PCB to account for PCB parasitics.
  • π or L matching and tuning may be required between cascaded passive components on the RF path.
CC3230S CC3230SF CC3230x Engine Area and Optional BLE CoexistenceFigure 9-5 CC3230x Engine Area and Optional BLE Coexistence
Table 9-1 Bill-of-Materials for CC3230x Engine Area and Optional Coexistence
QUANTITYDESIGNATORVALUEMANUFACTURERPART NUMBERDESCRIPTION
1C11 µFMuRataGRM155R61A105KE15DCapacitor, Ceramic, 1 µF,
10 V, ±10%, X5R, 0402
2C2, C3100 µFTaiyo YudenLMK325ABJ107MMHTCapacitor, Ceramic, 100 µF,
10 V, ±20%, X5R, 1210
3C4, C5, C64.7 µFTDKC1005X5R0J475M050BCCapacitor, Ceramic, 4.7 µF,
6.3 V, ±20%, X5R, 0402
10C7, C8, C9, C11, C12, C13, C18, C19, C21, C220.1 µFTDKC1005X5R1A104K050BACapacitor, Ceramic, 0.1 µF,
10 V, ±10%, X5R, 0402
3C10, C17, C2010 µFMuRataGRM188R60J106ME47DCapacitor, Ceramic, 10 µF,
6.3 V, ±20%, X5R, 0603
2C14, C1522 µFTDKC1608X5R0G226M080AACapacitor, Ceramic, 22 µF,
4 V, ±20%, X5R, 0603
1C161 µFTDKC1005X5R1A105K050BBCapacitor, Ceramic, 1 µF,
10 V, ±10%, X5R, 0402
2C23, C2410 pFMuRataGRM1555C1H100JA01DCapacitor, Ceramic, 10 pF,
50 V, ±5%, C0G/NP0, 0402
2C25, C266.2 pFMuRataGRM1555C1H6R2CA01DCapacitor, Ceramic, 6.2 pF,
50 V, ±5%, C0G/NP0, 0402
1C270.5 pFMuRataGRM1555C1HR50BA01DCapacitor, Ceramic, 0.5 pF,
50 V, ±20%, C0G/NP0, 0402
3C28(3), C29(3), C30(3)68 pFMuRataGRM0335C1H680JA1DCAP, CERM, 68 pF, 50 V,
+/- 5%, C0G/NP0, 0201
2C31(3), C32(3)100 pFYageoCC0201JRNPO8BN101CAP, CERM, 100 pF, 25 V,
+/- 5%, C0G/NP0, 0201
1E12.45-GHz AntennaTaiyo YudenAH316M245001-TANT Bluetooth W-LAN
Zigbee®, SMD
1FL11.02 dBTDKDEA202450BT-1294C1-HMultilayer Chip Band Pass Filter
For 2.4 GHz W-LAN/Bluetooth, SMD
1L13.3 nHMuRataLQG15HS3N3S02DInductor, Multilayer, Air Core,
3.3 nH, 0.3 A, 0.17 ohm, SMD
2L2, L42.2 µHMuRataLQM2HPN2R2MG0LInductor, Multilayer, Ferrite,
2.2 µH, 1.3 A, 0.08 ohm, SMD
1L31 µHMuRataLQM2HPN1R0MG0LInductor, Multilayer, Ferrite,
1 µH, 1.6 A, 0.055 ohm, SMD
1L5(1)10 µHTaiyo YudenCBC2518T100MInductor, Wirewound, Ceramic,
10 µH, 0.48 A, 0.36 ohm, SMD
1R110 kVishay-DaleCRCW040210K0JNEDResistor, 10 k, 5%, 0.063 W, 0402
6R2, R3, R4, R5, R9(3), R10(3)100 kVishay-DaleCRCW0402100KJNEDResistor, 100 k, 5%, 0.063 W, 0402
1R62.7 kVishay-DaleCRCW04022K70JNEDResistor, 2.7 k, 5%, 0.063 W, 0402
1R7270Vishay-DaleCRCW0402270RJNEDResistor, 270, 5%, 0.063 W, 0402
1R8(2)0PanasonicERJ-2GE0R00XResistor, 0, 5% 0.063W, 0402
1U1MX25RMacronix International Co., LTDMX25R3235FM1IL0Ultra-Low Power, 32-Mbit [x 1/x 2/x 4]
CMOS MXSMIO (Serial Multi I/O)
Flash Memory, SOP-8
1U2CC3230Texas InstrumentsCC3230SF12RGKSimpleLink™ Wi-Fi® and internet-of-things
Solution, a Single-Chip Wireless
MCU, RGK0064B
1U3(3)SPDT SwitchRichwaveRTC6608OSP0.03 GHz-6 GHz SPDT Switch
1Y1CrystalAbracon CorportationABS07-32.768KHZ-9-TCrystal, 32.768 KHz, 9PF, SMD
1Y2CrystalEpsonQ24FA20H0039600Crystal, 40 MHz, 8pF, SMD
For the CC3230SF device, L5 is populated. For the CC3230S device, L5 is not populated.
For the CC3230SF device, R8 is not populated. For the CC3230S device if R8 is populated, Pin 45 can be used as GPIO_31.
If the BLE/2.4GHz Coexistence features is not used, these components are not required.