ZHCS994B June   2012  – September 2018 CC430F5123 , CC430F5125 , CC430F5143 , CC430F5145 , CC430F5147 , CC430F6147

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 功能方框图
  2. 2修订历史记录
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
      1. Table 4-1 CC430F614x Terminal Functions
      2. Table 4-2 CC430F514x and CC430F512x Terminal Functions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 5.5  Typical Characteristics – Active Mode Supply Currents
    6. 5.6  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    7. 5.7  Typical Characteristics – Low-Power Mode Supply Currents
    8. 5.8  Low-Power Mode With LCD Supply Currents (Into VCC) Excluding External Current
    9. 5.9  Thermal Resistance Characteristics, CC430F51xx
    10. 5.10 Thermal Resistance Characteristics, CC430F61xx
    11. 5.11 Digital Inputs
    12. 5.12 Digital Outputs
    13. 5.13 Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
    14. 5.14 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    15. 5.15 Crystal Oscillator, XT1, Low-Frequency Mode
    16. 5.16 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    17. 5.17 Internal Reference, Low-Frequency Oscillator (REFO)
    18. 5.18 DCO Frequency
    19. 5.19 PMM, Brownout Reset (BOR)
    20. 5.20 PMM, Core Voltage
    21. 5.21 PMM, SVS High Side
    22. 5.22 PMM, SVM High Side
    23. 5.23 PMM, SVS Low Side
    24. 5.24 PMM, SVM Low Side
    25. 5.25 Wake-up Times From Low-Power Modes and Reset
    26. 5.26 Timer_A
    27. 5.27 USCI (UART Mode) Clock Frequency
    28. 5.28 USCI (UART Mode)
    29. 5.29 USCI (SPI Master Mode) Clock Frequency
    30. 5.30 USCI (SPI Master Mode)
    31. 5.31 USCI (SPI Slave Mode)
    32. 5.32 USCI (I2C Mode)
    33. 5.33 LCD_B Operating Conditions
    34. 5.34 LCD_B Electrical Characteristics
    35. 5.35 10-Bit ADC, Power Supply and Input Range Conditions
    36. 5.36 10-Bit ADC, Timing Parameters
    37. 5.37 10-Bit ADC, Linearity Parameters
    38. 5.38 REF, External Reference
    39. 5.39 REF, Built-In Reference
    40. 5.40 Comparator_B
    41. 5.41 Flash Memory
    42. 5.42 JTAG and Spy-Bi-Wire Interface
    43. 5.43 RF1A CC1101-Based Radio Parameters
      1. 5.43.1  RF1A Recommended Operating Conditions
      2. 5.43.2  RF Crystal Oscillator, XT2
      3. 5.43.3  Current Consumption, Reduced-Power Modes
      4. 5.43.4  Current Consumption, Receive Mode
      5. 5.43.5  Current Consumption, Transmit Mode
      6. 5.43.6  Typical TX Current Consumption, 315 MHz, 25°C
      7. 5.43.7  Typical TX Current Consumption, 433 MHz, 25°C
      8. 5.43.8  Typical TX Current Consumption, 868 MHz
      9. 5.43.9  Typical TX Current Consumption, 915 MHz
      10. 5.43.10 RF Receive, Overall
      11. 5.43.11 RF Receive, 315 MHz
      12. 5.43.12 RF Receive, 433 MHz
      13. 5.43.13 RF Receive, 868 MHz and 915 MHz
      14. 5.43.14 Typical Sensitivity, 315 MHz, Sensitivity Optimized Setting
      15. 5.43.15 Typical Sensitivity, 433 MHz, Sensitivity Optimized Setting
      16. 5.43.16 Typical Sensitivity, 868 MHz, Sensitivity Optimized Setting
      17. 5.43.17 Typical Sensitivity, 915 MHz, Sensitivity Optimized Setting
      18. 5.43.18 RF Transmit
      19. 5.43.19 Optimum PATABLE Settings for Various Output Power Levels and Frequency Bands
      20. 5.43.20 Typical Output Power, 315 MHz
      21. 5.43.21 Typical Output Power, 433 MHz
      22. 5.43.22 Typical Output Power, 868 MHz
      23. 5.43.23 Typical Output Power, 915 MHz
      24. 5.43.24 Frequency Synthesizer Characteristics
      25. 5.43.25 Typical RSSI_offset Values
  6. 6Detailed Description
    1. 6.1  Sub-1 GHz Radio
    2. 6.2  CPU
    3. 6.3  Operating Modes
    4. 6.4  Interrupt Vector Addresses
    5. 6.5  Memory Organization
    6. 6.6  Bootloader (BSL)
    7. 6.7  JTAG Operation
      1. 6.7.1 JTAG Standard Interface
      2. 6.7.2 Spy-Bi-Wire Interface
    8. 6.8  Flash Memory
    9. 6.9  RAM
    10. 6.10 Backup RAM
    11. 6.11 Peripherals
      1. 6.11.1  Oscillator and System Clock
      2. 6.11.2  Power-Management Module (PMM)
      3. 6.11.3  Digital I/O
      4. 6.11.4  Port Mapping Controller
      5. 6.11.5  System Module (SYS)
      6. 6.11.6  DMA Controller
      7. 6.11.7  Watchdog Timer (WDT_A)
      8. 6.11.8  CRC16
      9. 6.11.9  Hardware Multiplier
      10. 6.11.10 AES128 Accelerator
      11. 6.11.11 Universal Serial Communication Interface (USCI)
      12. 6.11.12 TA0
      13. 6.11.13 TA1
      14. 6.11.14 Real-Time Clock (RTC_D)
      15. 6.11.15 Voltage Reference (REF) (Including Output)
      16. 6.11.16 LCD_B (Only CC430F614x)
      17. 6.11.17 Comparator_B
      18. 6.11.18 ADC10_A (CC430F614x and CC430F514x Only)
      19. 6.11.19 Embedded Emulation Module (EEM) (S Version)
      20. 6.11.20 Peripheral File Map
    12. 6.12 Input/Output Diagrams
      1. 6.12.1  Port P1 (P1.0 to P1.4) Input/Output With Schmitt Trigger
      2. 6.12.2  Port P1 (P1.5 to P1.7) Input/Output With Schmitt Trigger
      3. 6.12.3  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      4. 6.12.4  Port P3 (P3.0 to P3.7) Input/Output With Schmitt Trigger
      5. 6.12.5  Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger (CC430F614x Only)
      6. 6.12.6  Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger
      7. 6.12.7  Port P5 (P5.2 to P5.4) Input/Output With Schmitt Trigger (CC430F614x Only)
      8. 6.12.8  Port P5 (P5.5 to P5.7) Input/Output With Schmitt Trigger (CC430F614x Only)
      9. 6.12.9  Port PJ (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      10. 6.12.10 Port PJ (PJ.1 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    13. 6.13 Device Descriptor Structure
  7. 7Applications, Implementation, and Layout
    1. 7.1 Application Circuits
  8. 8器件和文档支持
    1. 8.1  入门和后续步骤
    2. 8.2  Device Nomenclature
    3. 8.3  工具和软件
    4. 8.4  文档支持
    5. 8.5  相关链接
    6. 8.6  社区资源
    7. 8.7  商标
    8. 8.8  静电放电警告
    9. 8.9  Export Control Notice
    10. 8.10 Glossary
  9. 9机械，封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

1.3 说明

TI CC430 系列超低功耗片上系统微控制器搭载有集成射频收发器内核，并包含数个采用各种不同外设集的器件，可广泛应用于各种 应用。此架构经过优化，与七种低功耗模式（包括 LPM3.5 和 LMP4.5）相配合使用，可延长便携式测量应用中的电池 寿命。该器件 具有 功能强大的 MSP430 16 位 RISC CPU、16 位寄存器和有助于获得最大编码效率的常数发生器。

CC430 系列器件将微控制器内核、外设、软件和射频收发器紧密集成在一起，从而使得这些真正的片上系统解决方案方便易用，同时性能也得以提高。

CC430F614x 系列采用微控制器片上系统配置，将先进的 CC1101 低于 1GHz 射频收发器的出色性能与 MSP430 CPUXV2 相结合，提供高达 32KB 的系统内可编程闪存、高达 4KB 的 RAM、两个 16 位计时器、一个具有 8 个外部输入端以及多个内部温度和电池传感器的 10 位高性能 ADC、一个比较器、USCI、一个 128 位 AES 安全加速器、一个硬件乘法器、DMA、一个带报警功能的 RTC 模块、一个 LCD 驱动器，以及多达 44 个 I/O 引脚。

CC430F514x 和 CC430F512x 系列采用微控制器片上系统配置，将先进的 CC1101 低于 1GHz 射频收发器的出色性能与 MSP430 CPUXV2 相结合，提供高达 32KB 的系统内可编程闪存、高达 4KB 的 RAM、两个 16 位计时器、一个具有 6 个外部输入端以及 CC430F514x 器件上所设的多个内部温度和电池传感器的 10 位高性能 ADC、一个比较器、USCI、一个 128 位 AES 安全加速器、一个硬件乘法器、DMA、一个带报警功能的 RTC 模块，以及多达 30 个 I/O 引脚。

如需完整的模块说明，请参阅《CC430 系列用户指南》

器件信息(1)

器件型号 封装 封装尺寸(2)
CC430F6147IRGC VQFN (64) 9mm x 9mm
CC430F5147IRGZ VQFN (48) 7mm x 7mm
(1) 要获得最新的米6体育平台手机版_好二三四、封装和订购信息，请参见封装选项附录（Section 9），或者访问米6体育平台手机版_好二三四 (TI) 网站 www.yogichopra.com。
(2) 这里显示的尺寸为近似值。要获得包含误差值的封装尺寸，请参见机械数据（Section 9）。
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