In applications that employ separate power sources to drive V_DD and the signal inputs, the V_DD current capability should exceed V_DD/R_L (R_L = effective external load of the four CD4066B device bilateral switches). This provision avoids any permanent current flow or clamp action on the V_DD supply when power is applied or removed from the CD4066B device.

In certain applications, the external load-resistor current can include both V_DD and signal-line components. To avoid drawing V_DD current when switch current flows into pins 1, 4, 8, or 11, the voltage drop across the bidirectional switch must not exceed 0.8V (calculated from r_on values shown).

No V_DD current flows through R_L if the switch current flows into pins 2, 3, 9, or 10.