ZHCSWD2C November 1998 – May 2024 CD54AC273 , CD54ACT273 , CD74AC273 , CD74ACT273
PRODUCTION DATA
3 Pin Configuration and Functions
Figure 3-1 CD54AC273, CD54ACT273 (CDIP)
CD74AC273, CD74ACT273 (PDIP, SOIC) Top ViewPin Functions
| PIN | I/O(1) | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| !MR | 1 | I | Master reset, active low |
| Q0 | 2 | O | Output Q0 |
| D0 | 3 | I | Input D0 |
| D1 | 4 | I | Input D1 |
| Q1 | 5 | O | Output Q1 |
| Q2 | 6 | O | Output Q2 |
| D2 | 7 | I | Input D2 |
| D3 | 8 | I | Input D3 |
| Q3 | 9 | O | Output Q3 |
| GND | 10 | - | Ground |
| CP | 11 | I | Clock, rising edge triggered |
| Q4 | 12 | O | Output Q4 |
| D4 | 13 | I | Input D4 |
| D5 | 14 | I | Input D5 |
| Q5 | 15 | O | Output Q5 |
| Q6 | 16 | O | Output Q6 |
| D6 | 17 | I | Input D6 |
| D7 | 18 | I | Input D7 |
| Q7 | 19 | O | Output Q7 |
| VCC | 20 | - | Supply |
(1) I = input, O = output, I/O =
input or output, G = ground, P = power.