ZHCSN66D january   1998  – january 2021 CD54HC00 , CD74HC00

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5.   5
  6.   6
  7. 4 Revision History
  8. 5 Pin Configuration and Functions
    1.     Pin Functions
  9. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  10. 7 Parameter Measurement Information
  11. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Balanced CMOS Push-Pull Outputs
    4. 8.4 Standard CMOS Inputs
    5. 8.5 Clamp Diode Structure
    6. 8.6 Device Functional Modes
  12. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  13. 10Power Supply Recommendations
  14. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  15. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  16. 13Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • J|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.5 Clamp Diode Structure

The inputs and outputs to this device have both positive and negative clamping diodes as depicted in Electrical Placement of Clamping Diodes for Each Input and Output.

CAUTION:

Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to the device. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

GUID-2FEC014A-6503-42D9-911A-C79AF74820AF-low.gifFigure 8-2 Electrical Placement of Clamping Diodes for Each Input and Output
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