ZHCSRJ0D September 1997 – April 2021 CD54HC32 , CD74HC32
PRODUCTION DATA
此器件包含四个独立双输入或门。每个逻辑门以正逻辑执行布尔函数 Y = A + B。
器件型号 | 封装 | 封装尺寸(标称值) |
---|---|---|
CD74HC32M | SOIC (14) | 8.70mm × 3.90mm |
CD74HC32E | PDIP (14) | 19.30mm × 6.40mm |
CD54HC32F | CDIP (14) | 21.30mm × 7.60mm |