米6体育平台手机版

PRODUCTION DATA

请参考 PDF 数据表获取器件具体的封装图。

5.6 Switching Characteristics

C_L = 50 pF, Input t_r, t_f = 6 ns

PARAMETER		TEST CONDITIONS	V_CC (V)	25℃			–40℃ to 85℃		–55℃ to 125℃		UNIT
PARAMETER		TEST CONDITIONS	V_CC (V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNIT
HC TYPES
t_PLH, t_PHL	Propagation delay Clock to output	C_L = 50 pF	2			165		205		250	ns
		C_L = 50 pF	4.5			33		41		50	ns
		C_L = 15 pF	5		15						ns
		C_L = 50 pF	6			28		35		43	ns
t_PLZ, t_PHZ	Output disable to Q	C_L = 50 pF	2			135		170		205	ns
		C_L = 50 pF	4.5			27		34		41	ns
		C_L = 15 pF	5		11						ns
		C_L = 50 pF	6			23		29		35	ns
t_PZL, t_PZH	Output enable to Q	C_L = 50 pF	2			150		190		225	ns
		C_L = 50 pF	4.5			30		38		45	ns
		C_L = 15 pF	5		12						ns
		C_L = 50 pF	6			26		33		38	ns
f_MAX	Maximum clock frequency	C_L = 15 pF	5		60						MHz
t_THL, t_TLH	Output transition time	C_L = 50 pF	2			60		75		90	ns
			4.5			12		15		18
			6			10		13		15
C_I	Input capacitance	C_L = 50 pF		10		10		10		10	pF
C_O	Three-state output capacitance			20		20		20		20	pF
C_PD	Power dissipation capacitance⁽¹⁾⁽²⁾	C_L = 15 pF	5		39						pF
HCT TYPES
t_PHL, t_PLH	Propagation delay Clock to output	C_L = 50 pF	4.5			33		41		50	ns
t_PHL, t_PLH	Propagation delay Clock to output	C_L = 15 pF	5		15						ns
t_PLZ, t_PHZ	Output disable to Q	C_L = 50pF	4.5			28		35		42	ns
t_PLZ, t_PHZ	Output disable to Q	C_L = 15 pF	5		11						ns
t_PZL, t_PZH	Output enable to Q	C_L = 50 pF	4.5			30		38		45	ns
t_PZL, t_PZH	Output enable to Q	C_L = 15 pF	5		12						ns
f_MAX	Maximum clock frequency	C_L = 15 pF	5		60						MHz
t_TLH, t_THL	Output transition time	C_L = 50 pF	4.5			12		15		18	ns
C_I	Input capacitance	C_L = 50 pF		10		10		10		10	pF
C_O	Three-state output capacitance			20		20		20		20	pF
C_PD	Power dissipation capacitance⁽¹⁾⁽²⁾	C_L = 15 pF	5		47						pF

(1) C_PD is used to determine the dynamic power consumption, per package.

(2) P_D = C_PD V_CC² f_i + Σ V_CC² f_O C_L where f_i = input frequency, f_O = output frequency, C_L = output load capacitance, V_CC = supply voltage.