ZHCSKG8A November 2019 – February 2020 CDCDB2000
PRODUCTION DATA.
The SMBus address is assigned by configuration of two pins (SADR1 and SADR0) that each support three levels. This configuration allows the CDCDB2000 to assume 9 different SMBus addresses.
The SMBus address pins are sampled PWRGD is set to 1. See Table 7 for address pin configuration. The address cannot be changed until the PWRGD state is cleared by powering down the device.
SADR1 | SADR0 | SMBUS ADDRESS |
---|---|---|
L | L | 0xD8 |
L | M | 0xDA |
L | H | 0xDE |
M | L | 0xC2 |
M | M | 0xC4 |
M | H | 0xC6 |
H | L | 0xCA |
H | M | 0xCC |
H | H | 0xCE |