The CKPWRGD_PD# pin is used to set 2 state variables inside of the device: PWRGD, and PD#. The PWRGD and PD# variables control which functions of the device are active at any time, as well as the state of the input and output pins.

The PWRGD and PD# states are multiplexed on the CKPWRGD_PD# pin. CKPWRGD_PD# must remain below VOL and not exceed VDD_A + 0.3 V until VDD, VDD_A, and CLKIN are present and within the recommended operating conditions.

The first rising edge of the CKPWRGD_PD# pin sets PWRGD = 1. After PWRGD is set to 1, the CKPWRGD_PD# pin is used to assert PD# mode only. PWRGD variable will only be cleared to 0 with the removal of VDD and VDD_A.

Figure 6-1 PWRGD and PD# State Changes